MICRO-25 Call for Papers

                                                  CALL FOR PAPERS & PARTICIPATION


                                                                          MICRO-25
                      THE 25th ANNUAL INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE


                                                        with special emphasis on
                                  Instruction-Level Parallel Processing Technology


                                                            Portland, Oregon, USA
                                                                December 1-4, 1992


                                    Sponsored by ACM SIGMICRO and IEEE CS TC-Micro
                                              with support from Intel Corporation




For the last quarter century, the annual MICRO conference has been a key
forum for presenting major breakthroughs in computer microarchitecture.
In particular, its technical papers have made significant contributions to
the technologies underlying VLIW and superscalar processors. Last year's
MICRO-24 was the first of the major conferences with instruction-level
parallelism as its primary focus. With the instruction-level parallel
processing technology developing rapidly, this year's conference promises
to be the premier forum for discussion and debate on this technology. We
invite all leading researchers and designers to participate in this
landmark meeting in Portland, Oregon to discuss new directions in
instruction-level parallel processing.


This 25th anniversary meeting of MICRO will start with an invited lec-
ture series on critical components of the instruction-level parallel
processing technology. The lectures will address compiler, processor, and
fabrication technologies.


The conference seeks original papers concerning all aspects of microar-
chitecture including implementation and compilation for VLIW, super-
scalar, superpipelined, and multiprocessor systems. The topics of
interest include, but are not limited to, the following:


* Instruction-level Parallel Processing: Compiler and Hardware Tech-
          nologies


* Tradeoffs: Compiler, Architecture, and Microarchitecture


* Processor, Memory System, and I/O Microarchitectures


* Code Scheduling and Optimization Techniques


* Cost and Performance Tradeoffs in Real Machines


* VLIW and Superscalar Compiler Design and Implementation


* Hardware and Software Issues for VLIW and Superscalar Based Mul-
                    tiprocessors


* Compatibility and Portability


* High Level Synthesis and Testability


The deadline for submission of papers is June 16, 1992. Five copies of
the original manuscript, not exceeding 5000 words, should be sent to the
General Chair. The identification of the primary author, including name,
affiliation, address, e-mail address, phone number, and FAX number, should
appear on the title page. Each copy should include a 100-word abstract
and five keywords.


All papers will be refereed by members of the program committee who are
familiar with the topic and by outside referees. Papers will be accepted
as either full or short papers. Notification of acceptance/rejection will
occur by August 18, 1992. The camera ready copy of the accepted papers
will be due on September 22, 1992.


Proposals for special sessions (panel discussions and working group dis-
cussions) should be sent to the General Chair by June 16, 1992.


Program Committee


                    Vicki Allan, Utah State
                    Richard Belgard, Consultant
                    James Bondi, Texas Instruments
                    Pohua Chang, Intel
                    Robert Colwell, Intel
                    Kemal Ebcioglu, IBM
                    Josh Fisher, Hewlett-Packard
                    Mike Flynn, Stanford
                    Stanley Habib, CUNY
                    Wen-mei Hwu, U. Illinois
                    Gearold Johnson, Colo. State
                    Joseph Linn, Microsoft
                    Bill Mangione-Smith, Motorola
                    Hans Mulder, Intel
                    Toshio Nakatani, IBM Japan
                    Alex Nicolau, UC Irvine
                    Chris Papachristou, Case Western
                    Yale Patt, U. Michigan
                    Bob Rau, Hewlett-Packard
                    John Shen, CMU
                    Will Tracz, IBM
                    Gus Uht, UCSD
                    Andrew Wolfe, Princeton


          General and Program Chair


                    Wen-mei W. Hwu
                    Department of Electrical and Computer Engineering
                    University of Illinois
                    1101 W. Springfield Ave.
                    Urbana, IL 61801, USA
                    hwu@crhc.uiuc.edu
                    (217) 244-8270, -5686 FAX


          Steering Committee


                    Richard Belgard, Consultant
                    Gearold Johnson, Colorado State
                    Joseph Linn, Microsoft
                    Yashwant Malaiya, Colorado State
                    Yale Patt, U. Michigan


          Local Arrangements Chair


                    Pohua Chang, Intel
                    pohua@ijf1.intel.com


          Administration Coordinator


                    Sabrina Hwu, U. of Illinois
                    sabrina@crhc.uiuc.edu
                    (217) 244-8270, -5686 FAX
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