Re: SPARC compiler optimisation

In article 92-02-133 dmk@craycos.com (David Keaton) writes:
      [advised instruction sequence for a particular pience of code]


Depending on the implementation, each load is generally two or three
      clocks long even if there is a cache hit. This can be cut down by
      aligning on a 64-bit boundary and using ldd (load-double) instructions.
      On implementations with a 64-bit bus, this doubles the througput. On
      32-bit implementations, it adds only one clodk to the load instead of the
      minimum two or three for a whole extra load instruction. Neither the Sun
      nor the GNU compilers take advantage of this very well.


I noticed this too---once last year I went to some lengths to design a
system so that common 2-word data objects were always double-aligned, so
that some particular code would run very fast using `ldd' everywhere. Then
I looked at the code output and found that not only was it not using
`ldd', but it was glopping these data objects around in temporary
(stack-allocated) regions, doing extra operations to conserve registers
when it had them to spare, etc.etc. I put in extra code so that the
compiler could be certain that this stuff was always aligned, but
evidently it discarded this information (even with all the optimise
switches on). This was on SPARC, with both gcc and cc. I didn't want to
code in assembly because it was meant to be portable (these ldd
instructions are everywhere these days :-). Can I ask whether gcc2 makes
use of ldd and std? Or whether there are _any_ compilers out there that
do? It was very frustrating. [Can't say more about the project details,
I'm afraid].


Nick Haines nickh@cs.cmu.edu
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