Reading list for seminar "Compiling for Modern Architectures"

Folks -- Recently I had mentioned the seminar I am running this semester and
posted extracts from the reading list. Since I received a number of requests,
I have decided to post the syllabus and reading list for the seminar. This is
in LaTeX source form, but should be more or less readable if all you're
interested in is what the papers are, etc. After the \end{document} I also
provide the .bbl file (formatted bibliography) and the .bib file from which
the formatted version of the readings were taken. I hope this is useful. Note
that if any of you are planning a similar course, all the works are cleared
for limited classroom use (i.e., the copyrights are ok for that). For other
copying it is not clear, and I think it best if I not sell course packets
other than to my class (sorry). I don't claim this is the be-all/end-all of
reading lists on this topic, and I note that it is not intended to be "Issues
in Modern Compilers" or "Compiling Modern Languages", either.
Regards -- Eliot Moss
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\begin{center}
\Large\bf COINS 791V, Spring 1992 -- Compiling for Modern Architectures
\end{center}


{\bf Description:} Students will lead discussion of approximately 30 papers
from the literature. The topics covered include: an introduction to modern
architectures (including RISC, VLIW, superscalar, and superpipelined
machines), register allocation, instruction scheduling, dependency analysis
(for parallelization), cache and memory issues, and a small number of papers
on miscellaneous topics. In addition to presenting and discussing papers,
students will prepare a term paper or perform a project and report on it in
writing.


{\bf Time and location:} Monday/Wednesday, 2:05pm to 3:20pm, LGRC A339.


{\bf Instructor:} Prof.\ Eliot Moss, LGRC A217B, 545-4206, moss@cs.umass.edu;
office hours by appointment.


\begin{center}
\begin{tabular}{|r|l|l|}
\multicolumn{3}{c}{Schedule} \\
\hline
\multicolumn{1}{|c|}{\#} &
\multicolumn{1}{c|}{Date} &
\multicolumn{1}{c|}{Paper(s)} \\ \hline\hline
  1 & 1/29 & None (introduction and organization) \\ \hline
\hline\multicolumn{3}{|c|}{Introduction to Modern Architectures} \\ \hline
  2 & 2/03 & \cite{Stallings90,Muchnick90} \\ \hline
  3 & 2/05 & \cite{JW89,DA91} \\ \hline
  4 & 2/10 & \cite{CNOPR88} \\ \hline
\hline\multicolumn{3}{|c|}{Register Allocation} \\ \hline
  5 & 2/12 & \cite{CH90} \\ \hline
      & 2/17 & None (HOLIDAY) \\ \hline
  6 & 2/18 & \cite{CK91} (TUESDAY) \\ \hline
  7 & 2/19 & \cite{Chow88} \\ \hline
  8 & 2/24 & \cite{Wall86} \\ \hline
  9 & 2/26 & \cite{Wall88} \\ \hline
10 & 2/28 & \cite{CCK90} \\ \hline
\hline\multicolumn{3}{|c|}{Instruction Scheduling} \\ \hline
11 & 3/02 & \cite{HG83} \\ \hline
12 & 3/04 & \cite{GM86} \\ \hline
13 & 3/09 & \cite{Warren90,GR90} \\ \hline
14 & 3/11 & \cite{BR91,BYPASS91} \\ \hline
      & 3/16 & None (SPRING BREAK) \\ \hline
      & 3/18 & None (SPRING BREAK) \\ \hline
15 & 3/23 & \cite{Fisher81} \\ \hline
16 & 3/25 & \cite{BEH91} \\ \hline
\hline\multicolumn{3}{|c|}{Dependence Analysis} \\ \hline
17 & 3/30 & \cite{BC86} \\ \hline
18 & 4/01 & \cite{MHL91,GKT91} \\ \hline
\hline\multicolumn{3}{|c|}{Cache and Memory Issues} \\ \hline
19 & 4/06 & \cite{McFarling89} \\ \hline
20 & 4/08 & \cite{McFarling91} \\ \hline
21 & 4/13 & \cite{CKP91} \\ \hline
22 & 4/15 & \cite{WL91} \\ \hline
      & 4/20 & None (HOLIDAY) \\ \hline
23 & 4/22 & None (instructor absent) \\ \hline
24 & 4/27 & \cite{BD91} \\ \hline
\hline\multicolumn{3}{|c|}{Miscellaneous} \\ \hline
25 & 4/29 & \cite{Karr84} \\ \hline
26 & 5/04 & \cite{Morris91} \\ \hline
27 & 5/06 & \cite{Lam88} \\ \hline
28 & 5/11 & \cite{OA89} \\ \hline
29 & 5/13 & None (slack) \\ \hline
\end{tabular}
\end{center}


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syllabus.bbl -- the formatted bibliography file
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\begin{thebibliography}{}


\bibitem[ASPLOS, 1989]{asplos3}
{\em Third International Conference on Architectural Support for Programming
    Languages and Operating Systems\/} (Boston, MA, Apr. 1989), ACM.


\bibitem[ASPLOS, 1991]{asplos4}
{\em Fourth International Conference on Architectural Support for Programming
    Languages and Operating Systems\/} (Santa Clara, CA, Apr. 1991), ACM.


\bibitem[Benitez and Davidson, 1991]{BD91}
Manuel~E. Benitez and Jack~W. Davidson.
\newblock Code generation for streaming: an access/execute mechanism.
\newblock In \cite{asplos4}, pp.~132--141.


\bibitem[Bernstein and Rodeh, 1991]{BR91}
David Bernstein and Michael Rodeh.
\newblock Global instruction scheduling for superscalar machines.
\newblock In \cite{sigplan91}, pp.~241--255.


\bibitem[Bradlee {\em et~al.}, 1991]{BEH91}
David~G. Bradlee, Susan~J. Eggers, and Robert~R. Henry.
\newblock Integrating register allocation and instruction scheduling for
    {RISC}s.
\newblock In \cite{asplos4}, pp.~122--131.


\bibitem[Burke and Cytron, 1986]{BC86}
Michael Burke and Ron Cytron.
\newblock Interprocedural dependence analysis and parallelization.
\newblock In \cite{sigplan86}, pp.~162--175.


\bibitem[Butler {\em et~al.}, 1991]{BYPASS91}
Michael Butler, Tse-Yu Yeh, Yale Patt, Mitch Alsup, Hunter Scales, and Michael
    Shebanow.
\newblock Single instruction stream parallelism is greater than two.
\newblock In {\em 18th Annual International Symposium on Computer
    Architecture\/} (Toronto, May 1991), ACM, pp.~276--286.


\bibitem[Callahan {\em et~al.}, 1990]{CCK90}
David Callahan, Steve Carr, and Ken Kennedy.
\newblock Improving register allocation for subscripted variables.
\newblock In {\em Proceedings of the {SIGPLAN} '90 Conference on Programming
    Language Design and Implementation\/} (White Plains, NY, June 1990), ACM,
    pp.~53--65.


\bibitem[Callahan {\em et~al.}, 1991]{CKP91}
David Callahan, Ken Kennedy, and Allan Porterfield.
\newblock Software prefetching.
\newblock In \cite{asplos4}, pp.~40--52.


\bibitem[Callahan and Koblenz, 1991]{CK91}
David Callahan and Brian Koblenz.
\newblock Register allocation via hierarchical graph coloring.
\newblock In \cite{sigplan91}, pp.~192--203.


\bibitem[Chow, 1988]{Chow88}
Fred~C. Chow.
\newblock Minimizing register usage penalty at procedure calls.
\newblock In \cite{sigplan88}, pp.~85--94.


\bibitem[Chow and Hennessy, 1990]{CH90}
Fred~C. Chow and John~L. Hennessy.
\newblock The priority-based coloring approach to register allocation.
\newblock {\em ACM Transactions on Programming Languages and Systems 12}, 4
    (Oct. 1990), 501--536.


\bibitem[Colwell {\em et~al.}, 1988]{CNOPR88}
Robert~P. Colwell, Robert~P. Nix, John~J. O'Donnell, David~B. Papworth, and
    Paul~K. Rodman.
\newblock A {VLIW} architecture for a trace scheduling compiler.
\newblock {\em IEEE Transactions on Computers 37}, 8 (Aug. 1988), 967--979.


\bibitem[Diefendorff and Allen, 1991]{DA91}
Keith Diefendorff and Michael Allen.
\newblock Organization of the {Motorola} 88110: A superscalar {RISC}
    microprocessor.
\newblock In {\em International Processing Society of Japan (conference)\/}
    (Tokyo, Nov. 1991), pp.~77--87.


\bibitem[Fisher, 1981]{Fisher81}
Joseph~A. Fisher.
\newblock Trace scheduling: A technique for global microcode compaction.
\newblock {\em IEEE Transactions on Computers C-30}, 7 (July 1981), 478--490.


\bibitem[Gibbons and Muchnick, 1986]{GM86}
Phillip~B. Gibbons and Steven~S. Muchnick.
\newblock Efficient instruction scheduling for a pipelined architecture.
\newblock In \cite{sigplan86}, pp.~11--16.


\bibitem[Goff {\em et~al.}, 1991]{GKT91}
Gina Goff, Ken Kennedy, and Chau-Wen Tseng.
\newblock Practical dependence testing.
\newblock In \cite{sigplan91}, pp.~15--29.


\bibitem[Golumbic and Rainish, 1990]{GR90}
M.~C. Golumbic and V.~Rainish.
\newblock Instruction scheduling beyond basic blocks.
\newblock {\em IBM Journal of Research and Development 34}, 1 (Jan. 1990),
    93--97.


\bibitem[Hennessy and Gross, 1983]{HG83}
John Hennessy and Thomas Gross.
\newblock Postpass code optimization of pipeline constraints.
\newblock {\em ACM Transactions on Programming Languages and Systems 5}, 3
    (July 1983), 422--448.


\bibitem[Jouppi and Wall, 1989]{JW89}
Norman~P. Jouppi and David~W. Wall.
\newblock Available instruction-level parallelism for superscalar and
    superpipelined machines.
\newblock In \cite{asplos3}, pp.~272--282.


\bibitem[Karr, 1984]{Karr84}
Michael Karr.
\newblock Code generation by coagulation.
\newblock In {\em Proceedings of the {SIGPLAN} '84 Symposium on Compiler
    Construction\/} (Montreal, June 1984), ACM, pp.~1--12.


\bibitem[Lam, 1988]{Lam88}
Monica Lam.
\newblock Software pipelining: An effective scheduling technique for {VLIW}
    machines.
\newblock In \cite{sigplan88}, pp.~318--328.


\bibitem[Maydan {\em et~al.}, 1991]{MHL91}
Dror~E. Maydan, John~L. Hennessy, and Monica~S. Lam.
\newblock Efficient and exact data dependence analysis.
\newblock In \cite{sigplan91}, pp.~1--14.


\bibitem[McFarling, 1989]{McFarling89}
Scott McFarling.
\newblock Program optimization for instruction caches.
\newblock In \cite{asplos3}, pp.~183--191.


\bibitem[McFarling, 1991]{McFarling91}
Scott McFarling.
\newblock Procedure merging with instruction caches.
\newblock In \cite{sigplan91}, pp.~71--79.


\bibitem[Morris, 1991]{Morris91}
W.~G. Morris.
\newblock {CGG}: A prototype coagulating code generator.
\newblock In \cite{sigplan91}, pp.~45--58.


\bibitem[Muchnick, 1990]{Muchnick90}
Steven~S. Muchnick.
\newblock Optimizing compilers for {SPARC}.
\newblock In \cite{IEEE-RISC-Tutorial2e}, pp.~160--173.


\bibitem[Owicki and Agarwal, 1989]{OA89}
Susan Owicki and Anant Agarwal.
\newblock Evaluating the performance of software cache coherence.
\newblock In \cite{asplos3}, pp.~230--242.


\bibitem[SIGPLAN, 1986]{sigplan86}
{\em Proceedings of the {SIGPLAN} '86 Symposium on Compiler Construction\/}
    (Palo Alto, CA, June 1986), ACM.


\bibitem[SIGPLAN, 1988]{sigplan88}
{\em Proceedings of the {SIGPLAN} '88 Conference on Programming Language
    Design and Implementation\/} (Atlanta, GA, June 1988), ACM.


\bibitem[SIGPLAN, 1991]{sigplan91}
{\em Proceedings of the {SIGPLAN} '91 Conference on Programming Language
    Design and Implementation\/} (Toronto, June 1991), ACM.


\bibitem[Stallings, 1990a]{Stallings90}
William Stallings.
\newblock Reduced instruction set computer architecture.
\newblock In \cite{IEEE-RISC-Tutorial2e}, pp.~58--75.


\bibitem[Stallings, 1990b]{IEEE-RISC-Tutorial2e}
William Stallings, Ed.
\newblock {\em Reduced Instruction Set Computers}, second~ed.
\newblock IEEE Computer Society Press (Tutorial), 1990.


\bibitem[Wall, 1986]{Wall86}
David~W. Wall.
\newblock Global register allocation at link time.
\newblock WRL Research Report 86/3, Digital Equipment Corporation, Western
    Research Laboratory, Palo Alto, CA, Oct. 1986.
\newblock See also SIGPLAN Notices 21, 7, 264--275.


\bibitem[Wall, 1988]{Wall88}
David~W. Wall.
\newblock Register windows vs.\ register allocation.
\newblock In \cite{sigplan88}, pp.~67--78.


\bibitem[Warren, 1990]{Warren90}
H.~S. Warren, Jr.
\newblock Instruction scheduling for the {IBM} {RISC} {System}/6000 processor.
\newblock {\em IBM Journal of Research and Development 34}, 1 (Jan. 1990),
    85--92.


\bibitem[Wolf and Lam, 1991]{WL91}
Michael~E. Wolf and Monica~S. Lam.
\newblock A data locality optimizing algorithm.
\newblock In \cite{sigplan91}, pp.~30--44.


\end{thebibliography}
--
J. Eliot B. Moss, Assistant Professor
Department of Computer Science
Lederle Graduate Research Center
University of Massachusetts
Amherst, MA 01003
(413) 545-4206, 545-1249 (fax); Moss@cs.umass.edu
--

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