Memory Analysis

H T Fallside <htf@castle.ed.ac.uk>
27 Jan 92 11:33:11 GMT

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Memory Analysis htf@castle.ed.ac.uk (H T Fallside) (1992-01-27)
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Newsgroups: comp.compilers
From: H T Fallside <htf@castle.ed.ac.uk>
Keywords: optimize, vector
Organization: Edinburgh University
Date: 27 Jan 92 11:33:11 GMT

Hi Compilers,


Does anyone know of any analysis performed on array accesses and
techniques to optimise these operations? A typical example would be the
detection of redundant accesses in iterative loops. Cache memories go part
of the way towards solving the problem, but from a compilation point of
view there is still the work required to access the index followed by the
array access itself, before the cache is addressed. Recognising this and
keeping the accessed value local would lead to faster, more compact, code.


Do any compilers do this sort of thing at present? Any other array
manipulations considered by optimising compilers?


Cheers
Hamish
--
Hamish Fallside | Internet: htf@ed.ac.uk
Dept Electrical Engineering | Janet: htf@uk.ac.ed
The University of Edinburgh |
King's Buildings, Mayfield Road
Edinburgh EH9 3JL
[Vector and parallel compilers do all sorts of analysis to allow as many
references as possible to proceed in parallel. Perhaps someone can suggest
a few references. -John]
--

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