Related articles |
---|
Inline block moves disque@unx.sas.com (1991-11-11) |
Re: Inline block moves mwm@pa.dec.comMeyer) (1991-11-11) |
Inline block moves jfc@ATHENA.MIT.EDU (John Carr) (1991-11-11) |
Inline block moves jfc@ATHENA.MIT.EDU (John Carr) (1991-11-12) |
Re: Inline block moves christer@cs.umu.se (1991-11-12) |
Re: Inline block moves Bruce.Hoult@actrix.gen.nz (1991-11-12) |
Re: Inline block moves meissner@osf.org (1991-11-15) |
Newsgroups: | comp.compilers |
From: | mwm@pa.dec.com (Mike (My Watch Has Windows) Meyer) |
Keywords: | optimize, code, architecture |
Organization: | Missionaria Phonibalonica |
References: | 91-11-035 |
Date: | 11 Nov 91 16:27:22 |
That was interesting; thanks for posting it. I have three comments:
1) I'd be interested in seeing this extended to include a couple of
RISC processers; say the MIPS and SPARC chips. Is there someone who
knows those machines who can be talked into doing the work?
[See the next message. -John]
2) I've seen the SAS/C compiler generate movem instructions for a
constant block move.
3) Regarding the table at the end, shouldn't
68000 32 16M 16M N Y N Y
be
68000 16/32(4) 16M 16M N Y N Y
(4) 16 bit external bus width; 32 bits internal for some operations
?
thanx again,
<mike
--
Mike Meyer, mwm@pa.dec.com, decwrl!mwm
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