Easily retargetable register allocators

I am working on a machine independent or easily retargetable register
allocator, alternatively a register allocator generator, for my M.Sc.
project.


The allocator is part of a bigger project: a code generator generator,
that will be used to develop new architectures, (e.g. "what will happen if
we increase the number of integer registers and decrease cache size (fixed
chip size)"...).


I would like to have pointers to litterature. I am also interested in your
experience with similar problems. Please respond only with register
allocation issues (I am interested in everything, but I won't be finished
with it in a lifetime :-)).


This is my litterature list so far. I do not have all of it yet, I just
know that they exist. Is something missing from the list?


Chaitin, Auslander, Chandra, Cocke, Hopkins, Markstein,
    "Register Allocation via Coloring",
    Computer Languages 6 (1981), pp. 47 - 57.


Chaitin, "Register Allocation and Spilling via Graph Coloring",
    ACM SIGPLAN Notices, 17, 6 (June 1982), (Proceedings of the SIGPLAN 82
    Symposium on Compiler Construction), pp. 201 - 207.


Bernstein, Golumbic, Manour, Pinter, Goldin, Krawczyk, Nahshon,
    "Spill Code Minimization Techniques for Optimizing Compilers",
    Proceedings of the SIGPLAN 1989 Conference on Programming Language Design
    and Implementation, pp. 258 - 263.


Briggs, Cooper, Kennedy, Torczon,"Coloring Heuristics for Register Allocation"
    Proceedings of the SIGPLAN 1989 Conference on Programming Language Design
    and Implementation, pp. 275 - 284.


Chow, Hennesy, "Register Allocation by Priority based Coloring"
    Proceedings of the SIGPLAN 1984 Symposium on Compiler Construction, Vol 19,
    Number 6, pp. 222 - 231.


Larus, Hilfinger, "Register Allocation in the SPUR Lisp Compiler",
    Proceedings of the SIGPLAN 1986 Symposium on Compiler Construction,
    pp. 255 - 263.


Freiburghouse, "Register Allocation Via Usage Counts",
    Comm. ACM 17, 11, Nov. 74.


Leverett, "Register Allocation in Optimizing Compilers",
    Ph.D. Thesis and Technical Report CMU CS-81-103, Carnegie-Mellon
    University, February 1981.


Sites Perkins, "Machine-Independent Register Allocation",
    ACM SIGPLAN Notices, Vol 14, Number 8 (August 1979), (Proceedings of the
    SIGPLAN 79 Symposium on Compiler Construction), pp 221 - 225


Wall, "Register Windows vs. Register Allocation",
    Proceedings of the ACM SIGPLAN 1988 Conference on Programming Language
    Design and Implementation, pp. 67 - 68.


McKusic, "Register Allocation and Data Conversion in Machine
    Independent Code Generators",
    Ph.D. Thesis, UCB 1984, 121 pp (DA 8512915, Dissertion Abstracts Intl.)


Flajolet, Sipala, Steyaert,
    "Analytic vibrations on the common subexpression problem"
    Conference Title: Automata, Languages and Programming. 17th International
    Colloquium Proceedings, p.220-34


Davidson, Fraser, "Register allocation and exhaustive peephole optimization"
    Journal: Software - Practice and Experience,vol.14, no.9, p.857-65


--
Jens Hansson e-mail: e86jh@efd.lth.se Phone int+46-(0)46-112295
snail-mail: Skarpskyttev 6B, S-22242 Lund, Sweden
--

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