Re: VHDL Experience

In article 91-07-048, arthurc@doe.carleton.ca (Arthur Castonguay) writes:
> I'm embarking on the adventure of writing a VHDL compiler. Its going
> to be in a silicon compiler and will accept VHDL source and output
> a data flow graph which is then spun, tangled, and mutilated to produce
> the final output. ...


You might look at:


      "A Set of Tools for VHDL Design" by Peter B. Reintjes
        in "Logic Programming: Proceedings of the Eighth International Conference",
pp 548-562, MIT Press, 1991


To quote from the abstract: "... The Prolog programs are of comparable
speed and the source code is at least an order-of-magnitude smaller
than other VHDL implementations." The paper discusses a VHDL parser,
query system, pretty printer, compiler, incremental compiler and a
logic synthesis system.


The classic reference for using Prolog for compiling in general is:


      "Logic Programming and Compiler Writing" by D.H.D. Warren,
      in "Software - Practice and Experience", Vol 10, #2, pp 97-125,
      John Wiley and Sons, 1980


--
Peter Ludemann +1-415-813-3800 ludemann@quintus.com
--

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