Re: Portable Fast Direct Threaded Code

In article <1991Apr2.192125.7464@beaver.cs.washington.edu> pardo@cs.washington.edu (David Keppel) writes:
[references about threaded code, much stuff deleted]


David> %X Describes how to build a threaded code interpeter/compiler from
David> scratch.
David> * Less than 2:1 performance hit of threading compared to full
David> compilation.


I have a question about this. Numbers like this are often cited for
threaded-type code, but in Bell's paper this was for the PDP-11 (whose
addressing modes made it a natural for threaded code). Paul Klint's
"Interpretation Techniques" paper (Software P&E, v11, 1981) cites a
significant difference for interpreter fetch/decode times on different
architectures. He cited numbers around 2:1 for the PDP-11, but something
more like 9:1 for a Cyber. I did a Q&D evaluation of this for a RISC, and
the ratio I guestemated was closer to that Klint gave for the Cyber than
for the PDP-11 (not unexpectedly).


How architecturally dependent is the performance of these techniques
(relative to compiling to native code)?


Steve Vestal
Mail: Honeywell S&RC MN65-2100, 3660 Technology Drive, Minneapolis MN 55418
Phone: (612) 782-7049 Internet: vestal@src.honeywell.com
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