Machine Descriptions

In a previous posting and subject, Michael Orr asks about retargeting GCC to
an unusual machine type. I'd like to raise the question about machine
descriptions in general. It seems from all the papers I've read on this topic
that the research has focused on the VAX-11, MC680x0, PDP-11, IBM 360/370
kind of architecture. I don't remember much being done with SPARC, MIPS,
HP-PA RISC, 88000, ARM, architectures. Everybody ignores floating-point (and
fp coprocessors). And almost no one addresses run-time environments (I
remember one paper but I forget the author).


It seems that we're a very long way from a truely general machine description
mechanism. So long as you remain in the 'normal' and 'standard' kinds of
architectures machine description is ok; otherwise you have to build your
back-end the "old-fashioned" way - by hand. (IMHO you can still take
advantage of newer compiler technology, it's just not automated. You might
even have to find your own peephole optimizations.)


Is this an accurate assessment? If not, I'm sure someone will happily point
out the gaps in my knowledge (which I know to be significant :-)
--

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