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References wanted for Block-diagram compilers of Signal Flow Graphs andy@spec0.electrical-engineering.manchester.ac.uk (Andrew Nisbet (MSc)) (1990-11-28) |
Newsgroups: | comp.compilers,comp.dsp |
From: | Andrew Nisbet (MSc) <andy@spec0.electrical-engineering.manchester.ac.uk> |
Keywords: | DSP, question |
Organization: | Compilers Central |
Date: | Wed, 28 Nov 90 13:11:26 GMT |
Hi,
I'm a research student doing some work on the simulation of DSP
algorithms which are specified as cyclic directed graphs (Signal Flow
Graphs). A node in such a graph represents an arbitrary function such as
an FFT or a filter of some kind. An arc representsa First In First Out
queue of data elements. Each time a node executes it consumes data from
its input queues and produces data onto its output queues.
I'm interested in references which describe how to produce a
correct schedule for the execution of an algorithm specified as a signal
flow graph. I already have references for Blosim.
If there is a large response I'll post a summary to the net.
Thanks in advance,
Andy N.
Andy Nisbet, Dept. of Electrical Engineering, University of Manchester,
Manchester M13 9PL, England.
Internet: andy@spec0.ee.man.ac.uk Janet: andy@uk.ac.man.ee.spec0
ARPA: andy%ee.man.ac.uk@nsfnet-relay.ac.uk Wet String: (+44)-61-275-4561
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