Related articles |
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[8 earlier articles] |
Re: Compilers taking advantage of architectural enhancements hankd@dynamo.ecn.purdue.edu (1990-10-16) |
Re: Compilers taking advantage of architectural enhancements preston@titan.rice.edu (1990-10-16) |
Re: Compilers taking advantage of architectural enhancements anders@dit.lth.se (1990-10-17) |
Re: Compilers taking advantage of architectural enhancements larus@primost.cs.wisc.edu (1990-10-17) |
Re: Compilers taking advantage of architectural enhancements hankd@ecn.purdue.edu (1990-10-18) |
Re: Compilers taking advantage of architectural enhancements jourdan@minos.inria.fr (1990-10-19) |
Compilers taking advantage of architectural enhancements worley@compass.com (1990-10-23) |
Newsgroups: | comp.compilers |
From: | worley@compass.com (Dale Worley) |
Keywords: | code, design |
Organization: | Compilers Central |
Date: | Tue, 23 Oct 90 15:04:47 EDT |
Ah, a potentially interesting and useful topic. Perhaps we can start
a discussion that will lead to a list of possible hardware
architectural enhancements that a compiler can/cannot take advantage
of?
Part of the trouble with this idea is that "what hardware can be taken
advantage of" changes over time. For instance, I believe that the Cray-1 was
out for a number of years before people had developed good vectorizing
compilers -- since vector hardware hadn't existed, there was no incentive to
figure out how to build a compiler that took advantage of it! This leads to
a chicken-and-egg problem -- the compiler doesn't exist because no hardware
needs it, and vice-versa. The correct solution was mentioned by somebody --
develop both in parallel and tune the combination of the two for best price &
performance. Of course, it means you have to fund both a hardware effort and
a software effort!
Dale Worley Compass, Inc. worley@compass.com
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