Newsgroups: | comp.compilers |
From: | anders@dit.lth.se (Anders Ardo) |
Keywords: | design, optimize |
Organization: | Dep. of Computer Engineering, Lund Institute of Technology, Sweden |
References: | <1990Oct9> <3300194@m.cs.uiuc.edu> <AGLEW.90Oct11222801@treflan.crhc.uiuc.edu> <1990Oct12.230424.930@esegue.segue.boston.ma.us> <1689@seti.inria.fr> |
Date: | Tue, 16 Oct 90 08:52:49 GMT |
> In article <1990Oct12.230424.930@esegue.segue.boston.ma.us>,
> golds@fjcnet.GOV (Rich Goldschmidt) writes:
> => Maybe this is naive or too futuristic, but is anyone working towards
> => methods for automatically generating a compiler based on the architecture
> => design?
>
> There already has been a HUGE amount of work, [including]
> TWIG, BEG and Pagode (non-exhaustive list). ...
Could you please give some references to these systems.
> => [...] Chip designers might even take compilers into
> => consideration in their designs :-).
I fully agree.
We have just embarked on a project which aims at integrating a VLSI design
environment with compiler generation tools. This will enable us to rapidly
generate and test complete system (including applications) either
simulated or real hardware, thus enabling us to efficiently evaluate
different design tradeoffs between hardware and software.
--
Anders Ardo Tel: int+46 46 107522
Dept. of Computer Engineering fax: int+46 46 104714
University of Lund, P.O. Box 118 Internet: anders@dit.lth.se
S-221 00 Lund, Sweden or anders%dit.lth.se@uunet.uu.net
--
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