Re: Compilers taking advantage of architectural enhancements

In article <1990Oct12.230424.930@esegue.segue.boston.ma.us>,
golds@fjcnet.GOV (Rich Goldschmidt) writes:
=> Maybe this is naive or too futuristic, but is anyone working towards
=> methods for automatically generating a compiler based on the architecture
=> design?


There already has been a HUGE amount of work, and work is still going on, on
``automatic'' generation of *parts of* compilers from architectural
descriptions. The most obvious example is the work on code generation
(instruction selection and register allocation), for which there now exist
usable systems, e.g. TWIG, BEG and Pagode (non-exhaustive list). Pagode for
instance (I know it quite well because it is being developed by colleagues
of mine at INRIA) takes as input a grammar describing the input IR trees and
a description of the machine which can be very easily deduced from the
``programmer's manual'' provided by the CPU manufacturer. The basic
entities in a machine description are storage bases (registers, memory,
etc.), storage classes (groups thereof), access modes, access classes and
instructions. The semantics of the instructions is given in terms of the IR
grammar. From this Pagode generates an instruction selector and a register
allocator.


Work is also going on in other areas of compiler construction. For
instance, Francois Bodin showed in his thesis (``Optimisation de microcode
pour une architecture horizontale et synchrone: etude et mise en oeuvre d'un
compilateur'', U. Rennes, France, June 1989) that it was possible to use a
finer description of the machine, exhibiting timing and other ``internal''
information, to automatically generate instruction schedulers. Davidson and
Fraser are well known for their work on the automatic construction of
peephole optimizers from machines descriptions.


Automatic generation of other compiler phases is probably also possible but
you then have to take into account source-language issues in addition to
target-machine ones.


=> [...] Chip designers might even take compilers into
=> consideration in their designs :-).


This is obviously desirable, and I believe this was the main motivation
to start this discussion thread.


Martin Jourdan <jourdan@minos.inria.fr>, INRIA, Rocquencourt, France.
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