Re: Compilers taking advantage of architectural enhancements

spot@TR4.GP.CS.CMU.EDU (Scott Draves)
12 Oct 90 04:22:51 GMT

          From comp.compilers

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Newsgroups: comp.compilers
From: spot@TR4.GP.CS.CMU.EDU (Scott Draves)
Keywords: design, optimize
Organization: Carnegie Mellon University
References: <1990Oct9> <3300194@m.cs.uiuc.edu> <AGLEW.90Oct11222801@treflan.crhc.uiuc.edu>
Date: 12 Oct 90 04:22:51 GMT

[Copied from comp.arch -John]


|> >>Register file - large (around 128 registers, or more)
|> >> Most compilers do not get enough benefit from these to justify
|> >> the extra hardware, or the slowed down register access.
|> >
|> >In the proceedings of Sigplan 90, there's a paper about how to chew
|> >lots of registers.
|> >
|> > Improving Register Allocation for Subscripted Variables
|> > Callahan, Carr, Kennedy
|> >
|> >I suggested the subtitle "How to use of all those FP registers"
|> >but nobody was impressed. Also, there's a limit to how many registers
|> >you need, at least for scientific fortran. It depends on the speed
|> >of memory and cache, speed of the FPU, and the actual applications.
|> >The idea is that once the FPU is running at full speed,
|> >more registers are wasted.
|>


shouldn't loop unrolling burn lots of registers also? when unrolling,
which ceiling will you hit first, the number of registers, or the size
of the I-cache?


Scott Draves
spot@cs.cmu.edu
[A friend at Multiflow told me that the large register file was crucial to
get serious unrolling speedups. There was some rather tricky work balancing
unrolling vs. avoiding register saves by using otherwise unused registers in
leaf routines. -John]
--


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