Re: Compilers taking advantage of architectural enhancements

golds@fjcnet.GOV (Rich Goldschmidt)
12 Oct 90 17:43:47 GMT

          From comp.compilers
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[6 later articles]
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Newsgroups: comp.compilers
From: golds@fjcnet.GOV (Rich Goldschmidt)
Summary: automating compiler generation?
Keywords: design
Organization: Federal Judicial Center, Washington, D.C.
References: <1990Oct9> <3300194@m.cs.uiuc.edu> <AGLEW.90Oct11222801@treflan.crhc.uiuc.edu>
Date: 12 Oct 90 17:43:47 GMT

[Copied from comp.arch -John]


Maybe this is naive or too futuristic, but is anyone working towards
methods for automatically generating a compiler based on the architecture
design? It would seem that even before there is silicon, there is
enough info about a new CPU in the CAD system used for layout that the
features of special interest for generating a compiler are known. To
the extent that generating a compiler is rule based (those tasks a
good CS grad can do?), why hasn't it been automated? Or are there people
working on this now? Chip designers might even take compilers into
consideration in their designs :-).
--
Rich Goldschmidt: uunet!fjcp60!golds or golds@fjc.gov
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