Re: Compiler optimization and RISC.

cassel@sce.carleton.ca
9 Nov 89 8:50 -0500

          From comp.compilers
Related articles
Compiler optimization and RISC. skumar@sparky.rutgers.edu (1989-11-03)
Re: Compiler optimization and RISC. peterd@cs.washington.edu (1989-11-07)
Re: Compiler optimization and RISC. cassel@sce.carleton.ca (1989-11-15)
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From: cassel@sce.carleton.ca
Date: 9 Nov 89 8:50 -0500
References: <1989Nov3.153807.1427@esegue.segue.boston.ma.us> <1989Nov8.012429.391@esegue.segue.boston.ma.us>
Newsgroups: comp.arch,comp.compilers
Keywords: List of references.
Organization: Systems Eng., Carleton Univ., Ottawa, Canada

Here are a few pointers for code optimization on RISC.


1. Coding Guidelines for Pipelined Processors, James W. Rymarcyk,
International Business Machines, ACM 0-89791-066-4


2. Hennessy, J.L. and Gross, T.R., "Postpass Code Optimization of
Pipeline Constraints", ACM TOPLAS, Vol. 5, No 3., July, 1983.


3. T.R. Gross, Code Optimization of Pipeline Constraints", PHD
Dissertation, Standford University, Auguat 1983.
--
Ron Casselman (613) 788-5726 Systems and Computer Engineering,
uunet!mitel!sce!cassel (uucp) Carleton University,
cassel@sce.carleton.ca (bitnet) Ottawa, Ontario, Canada K1S 5B6.




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