Re: instruction scheduling

budd@bu-it.BU.EDU (Phil Budne)
Tue, 11 Jul 89 00:45:57 EDT

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Date: Tue, 11 Jul 89 00:45:57 EDT
From: budd@bu-it.BU.EDU (Phil Budne)

Several years ago I did the scheduler for a doomed CISC to RISC
translator (while working for a vendor which has only recently entered
the RISC market).


Here are some (dated) papers; Where I'm not sure of the Journals for I
have included the reprint IDs;


J.A. Fisher "Trace Scheduling: A Technique for Global Microcode
Compaction" IEEE Transactions on Computers, Volume C-30, No. 7, pp.
478-490, July 1981


A. Nicolau, J.A. Fisher "Using an Orale to Measure Potential
Parallelism in Single Stream Programs" 094-1895/81/0000/0171 $00.75
(c)1981 IEEE


J.L. Linn "SRDAG Compaction - A Generalization of Trace Scheduling to
Increase the use of Global Context Information" (c) 1983 ACM
0-89791-114/8/83/0010/0011 $00.75


J. Lah, D.E. Atkins "Tree Compaction of Microprograms" (c) 1983 ACM
0-89791-114/8/83/0010/0023 $00.75


J.A. Fisher, J.R. Ellis, ... "Parallel Processing: A Smart Compiler
and a Dumb Machine" Proceedings of the '84 Symposium on Compiler
Construction, SIGPLAN Notices v19, n6, June 1984


D. Bernstein, R.Y. Pinter, ... "Optimal Scheduling of Arithmetic
Operations in Parallel with Memory Access" (c) 1984 ACM
0-89791-147-4/85/001/0325 $00.75


J.A. Fisher "The VLIW Machine: A Multiprocessor for Compiling
Scientific Code" IEEE Computer, July 1984
[From budd@bu-it.BU.EDU (Phil Budne)]
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