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Re: Good explanation of Recursive Ascent Parsing wanted antispam@math.uni.wroc.pl (2022-10-06) |
Re: Good explanation of Recursive Ascent Parsing wanted 864-117-4973@kylheku.com (Kaz Kylheku) (2022-10-07) |
From: | Kaz Kylheku <864-117-4973@kylheku.com> |
Newsgroups: | comp.compilers |
Date: | Fri, 7 Oct 2022 18:57:01 -0000 (UTC) |
Organization: | A noiseless patient Spider |
References: | 22-09-018 22-09-024 22-10-021 |
Injection-Info: | gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="26573"; mail-complaints-to="abuse@iecc.com" |
Keywords: | architecture |
Posted-Date: | 08 Oct 2022 20:11:43 EDT |
On 2022-10-06, antispam@math.uni.wroc.pl <antispam@math.uni.wroc.pl> wrote:
> Of couse, modern machines tend to have larger caches than the
> old ones. But also modern machines are throughput oriented
> and my suffer more from latency.
But that's the latency of a single instruction you're talking about,
right?. E.g. a deeper pipeline can worsen the time from instruction
fetch to completion, if the clock isn't jacked up and propagation
delays reduced to compensate.
When do you care about single-instruction-level latency, other than if
concerned about pipeline stalls in some scenarios?
Throughput translates to low latency at the level of blocks of
instructions or procedures. The procedure call returns a result faster
due to throughput, which is less latency.
The latency you perceive on modern machines as an interactive user is
due to cra^H^H^Hrichly functional software stacks.
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