Related articles |
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8086 register allocation alexfrunews@gmail.com (Alexei A. Frounze) (2021-05-09) |
Re: 8086 register allocation pronesto@gmail.com (Fernando) (2021-05-10) |
Re: 8086 register allocation gah4@u.washington.edu (gah4) (2021-05-10) |
Re: 8086 register allocation DrDiettrich1@netscape.net (Hans-Peter Diettrich) (2021-05-11) |
Re: 8086 register allocation gah4@u.washington.edu (gah4) (2021-05-10) |
Re: 8086 register allocation tkoenig@netcologne.de (Thomas Koenig) (2021-05-11) |
Re: 8086 register allocation DrDiettrich1@netscape.net (Hans-Peter Diettrich) (2021-05-11) |
From: | Fernando <pronesto@gmail.com> |
Newsgroups: | comp.compilers |
Date: | Mon, 10 May 2021 04:46:31 -0700 (PDT) |
Organization: | Compilers Central |
References: | 21-05-005 |
Injection-Info: | gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="14625"; mail-complaints-to="abuse@iecc.com" |
Keywords: | architecture, optimize |
Posted-Date: | 10 May 2021 11:05:30 EDT |
In-Reply-To: | 21-05-005 |
Hi Alex,
I read part of your code. Very nice! The core algorithm (disregarding the x86 specific part) seems like 'local register allocation' using Belady's heuristic for spilling. I have a class about it here:
https://youtu.be/XmNXeNCGSIA
There has been some academic work about models for register allocation for x86. Two papers follow below:
* Register Allocation by Puzzle Solving, https://llvm.org/pubs/2008-06-PLDI-PuzzleSolving.pdf
* A generalized algorithm for graph-coloring register allocation, http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.10.3076&rep=rep1&type=pdf
Regards,
Fernando
> For the fun of it I've implemented a greedy bottom-up local register
> allocator for the intel 8086 CPU, which is known for its non-uniform
> use of registers in ALU instructions and memory operands
> (https://github.com/alexfru/regal86).
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