|Nitty-gritty aspects of register allocation email@example.com (Elijah Stone) (2020-09-10)|
|Re: Nitty-gritty aspects of register allocation firstname.lastname@example.org (Alexei A. Frounze) (2020-09-10)|
|Re: Nitty-gritty aspects of register allocation email@example.com (Bo Persson) (2020-09-11)|
|Re: Nitty-gritty aspects of register allocation firstname.lastname@example.org (2020-09-11)|
|From:||Bo Persson <email@example.com>|
|Date:||Fri, 11 Sep 2020 11:44:08 +0200|
|Injection-Info:||gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="86336"; mail-complaints-to="firstname.lastname@example.org"|
|Posted-Date:||11 Sep 2020 22:48:26 EDT|
On 2020-09-11 at 03:01, Alexei A. Frounze wrote:
> On Thursday, September 10, 2020 at 5:14:12 PM UTC-7, Elijah Stone wrote:
>> - The second-lowest 8 bits of some registers can be addressed
>> separately. When does it make sense to use them?
> AFAIR, on modern CPUs there are penalties in using subregisters.
> See e.g. Agner Fog's optimization manuals for details.
A long time ago, when translating 8085 code to 8086 - and mapping a pair
of 8-bit registers onto a 16-bit register - it was an advantage to have
separate access to the two halves.
Nowadays you just don't do that, so when more registers were added this
feature was not propagated to those. That's why these instructions are
only available for some registers.
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