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| Bit swizzling rick.c.hodgin@gmail.com (Rick C. Hodgin) (2020-09-05) |
| Re: Bit swizzling DrDiettrich1@netscape.net (Hans-Peter Diettrich) (2020-09-05) |
| Re: Bit Swizzling johnl@taugh.com (John Levine) (2020-09-05) |
| Re: Bit swizzling 793-849-0957@kylheku.com (Kaz Kylheku) (2020-09-05) |
| Re: Bit swizzling davidlovemore@gmail.com (davidl...@gmail.com) (2020-09-06) |
| Re: Bit Swizzling xxx.syseng.yyy@gfsys.co.uk (Chris) (2020-09-06) |
| Re: Bit swizzling martin@gkc.org.uk (Martin Ward) (2020-09-07) |
| Re: Bit swizzling rick.c.hodgin@gmail.com (Rick C. Hodgin) (2020-09-07) |
| Re: Bit swizzling DrDiettrich1@netscape.net (Hans-Peter Diettrich) (2020-09-08) |
| Re: Bit swizzling tomcrick@gmail.com (Tom Crick) (2020-09-08) |
| Re: Bit swizzling gah4@u.washington.edu (gah4) (2020-09-10) |
| Re: Bit swizzling rick.c.hodgin@gmail.com (Rick C. Hodgin) (2020-09-10) |
| From: | Chris <xxx.syseng.yyy@gfsys.co.uk> |
| Newsgroups: | comp.arch,comp.compilers |
| Date: | Sun, 06 Sep 2020 17:48:58 +0100 |
| Organization: | Aioe.org NNTP Server |
| References: | <riumcj$3j9$1@dont-email.me> <rivvah$1neg$2@gioia.aioe.org> 20-09-014 20-09-016 |
| Injection-Info: | gal.iecc.com; posting-host="news.iecc.com:2001:470:1f07:1126:0:676f:7373:6970"; logging-data="79013"; mail-complaints-to="abuse@iecc.com" |
| Keywords: | optimize, hardware, comment |
| Posted-Date: | 06 Sep 2020 13:20:15 EDT |
On 09/05/20 19:50, John Levine wrote:
> In article<rivvah$1neg$2@gioia.aioe.org>,
>>> -----
>>> Are there any algorithms which take a known-at-compile-time sequence
>>> of bitwise operations on an 8-bit to 64-bit quantity, and optimize
>>> them down to their minimal set of operations?
>
>> Why not just use a lookup table ?. Minimum ops and fast...
>
> Assuming you're looking for something you can implement in logic
> rather than by table lookup, it sounds like a set of Karnaugh maps.
Unless this is just an intellectual exercise for the fun of it, an
engineer would choose the minimal design at lowest cost to
satisfy the requirements. Table methods don't have to be in
software as a single eprom or gate array could do it in hardware.
8 inputs to address lines, then 8 bits of output, scale as required,
so why make life more difficult than necessary ?.
Old project here, where a programmer spent nearly 5 pages of 6800
asm to translate an input connect pin layout to that required for
the internal functions. Code was impenetrable, so substituted a
256 byte lookup table. Less space that the code and easily
modified for new requirements...
Chris
[I think the question is whether there is a way to mechanically
generate a version of the opaque assembler. -John]
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