Re: optimizing compilers for low power design

"Derek M. Jones" <derek@_NOSPAM_knosof.co.uk>
Mon, 16 Jun 2014 12:11:32 +0100

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optimizing compilers for low power design idatarm@gmail.com (2014-06-15)
Re: optimizing compilers for low power design kaz@kylheku.com (Kaz Kylheku) (2014-06-15)
Re: optimizing compilers for low power design ivan@ootbcomp.com (Ivan Godard) (2014-06-15)
Re: optimizing compilers for low power design Pidgeot18@verizon.com.invalid (2014-06-15)
Re: optimizing compilers for low power design derek@_NOSPAM_knosof.co.uk (Derek M. Jones) (2014-06-16)
Re: optimizing compilers for low power design walter@bytecraft.com (Walter Banks) (2014-06-16)
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Re: optimizing compilers for low power design gah@ugcs.caltech.edu (glen herrmannsfeldt) (2014-06-20)
Re: optimizing compilers for low power design ivan@ootbcomp.com (Ivan Godard) (2014-06-20)
Re: optimizing compilers for low power design genew@telus.net (Gene Wirchenko) (2014-06-20)
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From: "Derek M. Jones" <derek@_NOSPAM_knosof.co.uk>
Newsgroups: comp.compilers
Date: Mon, 16 Jun 2014 12:11:32 +0100
Organization: virginmedia.com
References: 14-06-003 14-06-004
Keywords: optimize, architecture, comment
Posted-Date: 16 Jun 2014 11:55:42 EDT

Kaz,


> Furthermore, even if power cost is real, and you choose instructions according
> to power cost, it's not going to work because instructions have to be primarily
> chosen according to the computation that needs to be done.


There has been some interesting work on making power minimization
a constraint during instruction scheduling.


A surprising percentage of power is consumed when a signal changes from
0 to 1 or from 1 to 0. So the idea is to arrange instruction order to
minimise the number of transitions at each bit position in an
instruction sequence.
[CMOS only uses power when it switches, so I'd think approximately all
of the power would be consumed when a signal changes. The idea of
Gray coded instruction streams is weirdly appealing. -John]


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