Re: How to eliminate redundant constant move instructions

On Nov 2, 2:32 am, George Neuner <gneuner2@comcast.net> wrote:
> It's very hard to tell anything without more context - we need to know
> what CPU, what compiler, and we need to see the surrounding code.


Sorry for the misleading message, the test case comes from a reported
gcc bug, at:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44025




> -fcprop-register, which is a peephole pass that eliminates redundant
> register moves (introduced by other optimizations), but that is


Yes, I found that pass, and seems it can solve the problem if I:
1, extend the pass in a value numbering way, at least for const
values;
2, extend the pass in a global data analysis way;


> performed after register allocation.


After register allocation also brings advantages, like no register
pressure issue.


> You have to remember that many CPUs can execute multiple
> instructions in parallel, and those parallel instruction streams may
> be executed out of order with respect to a program listing.


This is What I have missed. But in this manner I will never know which
codes is better since the performance depends on scheduling and
out-of- ordering... right?


Thanks for your explanation.

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