From: | glen herrmannsfeldt <gah@ugcs.caltech.edu> |
Newsgroups: | comp.compilers |
Date: | Tue, 1 Nov 2011 22:35:04 +0000 (UTC) |
Organization: | Aioe.org NNTP Server |
References: | 11-10-019 11-11-004 |
Keywords: | optimize |
Posted-Date: | 01 Nov 2011 22:25:29 EDT |
George Neuner <gneuner2@comcast.net> wrote:
(big snip on optimization and register loads)
> You might be asking "if the value already is in a register, why not
> just use it rather than load a second register?" The answer to that
> likely is a scheduling issue which depends on the use of the first
> register. You have to remember that many CPUs can execute multiple
> instructions in parallel, and those parallel instruction streams may
> be executed out of order with respect to a program listing.
That is what register renaming is for. Usually using more than
the architecturally specified number of registers, the CPU
internally remaps the registers such that it can keep one value
in a register while an instruction is being executed out of order.
This is especially important for IA32, with so few registers,
and for S/360 and S/370 floating point, again with few registers.
(Sometime in ESA/390 it was increased to 16, as the instruction
bits were there.)
> On most CPUs loading an immediate constant is as cheap as a register
> move. Also, loading a constant ties up only the target register
> whereas a move ties up both target and source registers.
Dynamic programming with the appropriate weights should choose
the optimal instruction sequence. If register clear is faster
than load immediate it would be chosen. Now, how to choose the
weights when one doesn't know the specific target processor?
That is a good question.
> So a lot more information is needed to say whether the compiler is
> doing something dumb or doing something clever.
-- glen
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