Re: Guidelines for instruction set design?

cyril.cressent@gmail.com wrote:


> - $C0..15: 32-bits "Counter" registers. They can be used to load a
> constant or an address and to do indirect memory addressing. They also
> support post-inc/decrementation, if you append ++ or -- to the
> register name.


You might want to consider one of -- or ++ be pre operation and the
other a post operation. I personally prefer ++ as a post operation in
the instruction set designs I have worked on.




> An example of instruction:
>
> add $Cb, $Ra, $Rd
> add $Cb, $CON, $Rd
> add $CON, $Ra, $Rd
> add d($Cb[--|++]), $Ra, $Rd
> add d($Cb[--|++]), $CON, $Rd
> add d($Cb[--|++]), d(Imm | $Ca[--|++]), $Rd
>


Can $Rd be $Cx ?


> I guess writing a compiler for the CPU is possible, but porting one is
> much more difficult, even for retargetable compilers: most of them
> make assumptions about the CPU (load/store, register based...).


Don't underestimate the effort it takes to write a compiler from scratch
it doesn't take very long to get to the first level of emitting some code
then the real work begins.


You might want to do the code generation in two levels one with
the load store that is designed to feed into a peephole optimizer to take
advantage of the three operand nature of your instructions set.
Register allocation may be sub-optimal


Regards,


--
Walter Banks
Byte Craft Limited
http://www.bytecraft.com

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