Related articles |
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Guidelines for instruction set design? cyril.cressent@gmail.com (2009-04-30) |
Re: Guidelines for instruction set design? rose@acm.org (Ken Rose) (2009-05-01) |
Re: Guidelines for instruction set design? kamalpr@gmail.com (2009-05-03) |
Re: Guidelines for instruction set design? gneuner2@comcast.net (George Neuner) (2009-05-03) |
Re: Guidelines for instruction set design? hsheboul@gmail.com (Hasan Alsheboul) (2009-05-04) |
Re: Guidelines for instruction set design? cyril.cressent@gmail.com (2009-05-04) |
Re: Guidelines for instruction set design? torbenm@pc-003.diku.dk (2009-05-04) |
Re: Guidelines for instruction set design? gah@ugcs.caltech.edu (glen herrmannsfeldt) (2009-05-05) |
[14 later articles] |
From: | Ken Rose <rose@acm.org> |
Newsgroups: | comp.compilers |
Date: | Fri, 01 May 2009 17:30:55 -0700 |
Organization: | TeraNews.com |
References: | 09-05-008 |
Keywords: | architecture |
Posted-Date: | 02 May 2009 18:52:02 EDT |
cyril.cressent@gmail.com wrote:
> I was wondering if there are some general guidelines one should
> observe when designing an instruction set so that a C compiler can
> easily be ported to that CPU.
> [Interesting question. C should be pretty straightforward on anything
> with flat byte addressing and enough registers to handle stack frames.
> What makes this architecture hard? -John]
I don't know anything about the poster's instruction set, but from my
own experience, it's a pain to have to have a scratch register to spill,
which makes a register+offset or register+register addressing mode very
handy.
Be careful that the instruction set supports all the branches that C
calls for. For instance, one machine I've worked on doesn't have an
overflow flag, which makes signed comparisons awkward.
- ken
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