Re: Graph colouring and local register allocation

glen herrmannsfeldt <gah@ugcs.caltech.edu>
Sun, 09 Dec 2007 15:40:07 -0800

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Related articles
[10 earlier articles]
Re: Graph colouring and local register allocation gneuner2@/comcast.net (George Neuner) (2007-12-01)
Re: Graph colouring and local register allocation pertti.kellomaki@tut.fi (=?ISO-8859-1?Q?Pertti_Kellom=E4ki?=) (2007-12-03)
Re: Graph colouring and local register allocation SidTouati@inria.fr (Sid Touati) (2007-12-04)
Re: Graph colouring and local register allocation torbenm@app-1.diku.dk (2007-12-05)
Re: Graph colouring and local register allocation SidTouati@inria.fr (Sid Touati) (2007-12-08)
Re: Graph colouring and local register allocation anton@mips.complang.tuwien.ac.at (2007-12-09)
Re: Graph colouring and local register allocation gah@ugcs.caltech.edu (glen herrmannsfeldt) (2007-12-09)
Re: Graph colouring and local register allocation SidTouati@inria.fr (Sid Touati) (2007-12-10)
| List of all articles for this month |

From: glen herrmannsfeldt <gah@ugcs.caltech.edu>
Newsgroups: comp.compilers
Date: Sun, 09 Dec 2007 15:40:07 -0800
Organization: Compilers Central
References: 07-10-103 07-11-019 07-11-063 07-11-091 07-12-003 07-12-005 07-12-007 07-12-010 07-12-013
Keywords: registers, optimize

Torben Fgidius Mogensen wrote:


(snip)


> Actually, register reuse is not a problem on most OOO architectures,
> as they use register renaming at runtime to avoid this kind of
> dependencies. And on processors that do dynamic runtime scheduling,
> compile-time scheduling is less important than avoiding spills: The
> processor can to some extent schedule around a bad compile-time
> schedule, but it can't undo a spill.


The 360/91 floating point unit, designed for an architecture with only
four floating point registers, had to be able to undo a spill. Memory
load requests look in the store buffer for a recent store, and will
take the value directly from the store buffer. A later store to the
same address will cancel the previous store request. (Assuming all
hazards are resolved.) If the source of the store hasn't completed
yet, register renaming will get back to the original source. A spill
inside a tight loop will likely be resolved by the processor logic,
with only the final value actually stored.


-- glen


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