From: | sdt <sjdutoit@gmail.com> |
Newsgroups: | comp.compilers |
Date: | Sat, 1 Dec 2007 09:07:18 -0800 (PST) |
Organization: | Compilers Central |
References: | 07-10-103 07-11-019 07-11-063 07-11-091 07-12-003 |
Keywords: | registers |
Posted-Date: | 01 Dec 2007 13:24:09 EST |
On Dec 1, 4:41 am, George Neuner <gneun...@comcast.net> wrote:
> If you know something different then how about providing some cites to
> help the rest of us?
I believe he is referring to his own PhD thesis work:
http://www.prism.uvsq.fr/~touati/thesis.html
Register allocation and scheduling are tightly coupled in terms of
their effects on each other. This work has some interesting ideas
around how both scheduling and register allocation can be rethought to
give higher priority to good register allocation while attempting to
not sacrifice scheduling for good ILP.
As to why he is being so mysterious in this thread, I cannot say.
Register allocation (and scheduling to the extent it relates) on, for
example, recent x86 architectures has a lot of other factors,
including out-of-order execution, register renaming and store-to-load
forwarding that are often ignored by register allocators and
schedulers. Of course, some of the effects of these are to effectively
remove some of the overhead of spilling, or reduce the importance of
instruction scheduling...
For another interesting approach at solving register allocation
problems, have a look at this:
http://compilers.cs.ucla.edu/fernando/projects/puzzles/
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