Re: Pitfalls in interference graph ?

ST <SidTouati@inria.fr>
Mon, 01 Oct 2007 11:10:17 +0200

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Pitfalls in interference graph ? shafitvm@gmail.com (Mohamed Shafi) (2007-09-28)
Re: Pitfalls in interference graph ? SidTouati@inria.fr (ST) (2007-10-01)
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Re: Pitfalls in interference graph ? bergner@vnet.ibm.com (Peter Bergner) (2007-10-01)
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From: ST <SidTouati@inria.fr>
Newsgroups: comp.compilers
Date: Mon, 01 Oct 2007 11:10:17 +0200
Organization: I.N.R.I.A Rocquencourt
References: 07-09-104
Keywords: analysis, registers
Posted-Date: 01 Oct 2007 10:05:24 EDT

Mohamed Shafi a icrit :
> I am trying to implement Briggs Optimistic register allocator after
> reading the the thesis written by Preston Briggs.
>
> Now for building the interference graph what other than register pairs
> is there any other issues that one has to look out for?


This a pretty old method of register allocation that do no longer work
well. Indeed, it was designed for the case of sequential processors.
Nowadays, processors implement instruction level parallelism. The
register allocation problem changed, and the old graph coloring
methods became useless.


Regards
S.T.


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