CFP: 2nd Workshop on Statistical and Machine learning approaches applied to ARchitectures and compilaTion (SMART'08), Goteborg, Sweden

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                                                            CALL FOR PAPERS


                                                            2nd Workshop on


                                  Statistical and Machine learning approaches
                                              to ARchitecture and compilaTion
                                                                (SMART'08)


                                    http://www.hipeac.net/smart-workshop.html


                                          January 27, 2008, Goteborg, Sweden


                                    (co-located with HiPEAC 2008 Conference)


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The rapid rate of architectural change has placed enormous pressure on
compiler writers to keep pace with microprocessor evolution. This
problem is compounded by the current trend to have multi-cores and
multi-threading which makes such systems increasingly difficult to
target. Also, current methods of designing computer systems will no
longer be feasible in 10-15 years time; what is needed are new
innovative approaches to architecture design that scale both with
advances in underlying technology and with future application domains.


In recent years, several papers have been published showing great
potential in constructing compilers and architectures using approaches
such as machine learning and search.


The purpose of this workshop is to promote new ideas and to present
recent developments in compiler and architecture design using machine
learning, statistical approaches, and search in order to enhance their
performance, scalability, and adaptability.


Topics of interest include (but are not limited to):


Machine Learning, Statistical Approaches, or Search applied to


* Feedback-Directed Compilation
* Auto-tuning Programs + Language Extensions
* Library Generators
* Iterative Compilation
* Dynamic Compilation/Adaptive Execution
* Parallel Compiler Optimizations
* Low-power Optimizations
* Simulation
* Performance Models
* Adaptive Processor and System Architecture
* Design Space Exploration
* Other Topics relevant to Intelligent and Adaptive Compilers/
Architectures


**** Paper Submission Guidelines ****


Paper length - maximum 15 pages.


Papers must be submitted in the PDF (preferably) or postscript
formats. Email your submissions to mob@inf.ed.ac.uk or use
workshop submission website.


Proceedings: An informal collection of the papers to be presented will
be distributed at the workshop. Questions regarding the workshop
proceedings should be forwarded to mob@inf.ed.ac.uk.


All accepted papers will appear on the workshop website.


**** Important Dates ****


Deadline for submission: November 2, 2007
Decision notification: November 30, 2007


Workshop: January 27, 2008


Organizer


Michael O'Boyle, University of Edinburgh UK


Program Committee


Francois Bodin, IRISA, France
Calin Cascaval, IBM T.J. Watson Research Center, USA
John Cavazos, University of Delaware, USA
Lieven Eeckhout, Ghent University, Belgium
Ari Freund, IBM Haifa Research Lab, Israel
Grigori Fursin, INRIA Futurs, France
Michael O'Boyle, University of Edinburgh UK
David Padua, University of Illinois at Urbana-Champaign, USA
Devika Subramanian, Rice University, USA
Olivier Temam, INRIA Futurs, France
Matthew J. Thazhuthaveetil, Indian Institute of Science, India
Richard Vuduc, Georgia Institute of Technology, USA
David Whalley, Florida State University, USA
Chris Williams, University of Edinburgh, UK

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