CFP: HiPEAC Workshop on Statistical and Machine learning approaches applied to ARchitectures and compilaTion (SMART'07) (Ghent, Belgium, Jan 07)
8 Sep 2006 23:21:12 -0400

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CFP: HiPEAC Workshop on Statistical and Machine learning approaches ap (2006-09-08)
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Newsgroups: comp.compilers
Date: 8 Sep 2006 23:21:12 -0400
Organization: Compilers Central
Keywords: CFP, conference
Posted-Date: 08 Sep 2006 23:21:12 EDT

                                                                CALL FOR PAPERS

                  First Workshop on Statistical and Machine learning approaches
                                          applied to ARchitectures and compilaTion
                                                                    (SMART '07)

                                                January 28, 2007, Ghent, Belgium

                                        (co-located with HiPEAC 2007 Conference)


The rapid rate of architectural change has placed enormous stress on
compiler writers to keep pace with microprocessor evolution. This
problem is compounded by the current trend to have multi-cores and
multi-threading which makes such systems increasingly difficult to
target. Also, current methods of designing computer systems will no
longer be feasible in 10-15 years time; what is needed are new
innovative approaches to architecture design that scale both with
advances in underlying technology and with future application domains.

In recent years, several papers have been published showing great
potential in constructing compilers and architectures using approaches
such as machine learning and search.

The purpose of this workshop is to promote new ideas and to present
recent developments in compiler and architecture design using machine
learning, statistical approaches, and search in order to enhance their
performance, scalability, and adaptability.

Topics of Interest (but not limited to):

Machine Learning, Statistical Approaches, or Search applied to

* Feedback-Directed Compilation
* Iterative Compilation
* Dynamic Compilation/Adaptive Execution
* Parallel Compiler Optimizations
* Low-power Optimizations
* Simulation
* Performance Models
* Processor and System Architecture
* Design Space Exploration
* Other Topics relevant to Intelligent and Adaptive

**** Paper Submission Guidelines ****

We invite two kinds papers:

* Research papers with new results (15 page limit)
* Short position/experience papers (5 page limit)

NOTE: Important ammendment to publication procedure:

In order to increase the importance of this workshop, we will host all
accepted papers on the workshop website.

Papers must be submitted in the PDF (preferably) or postscript
formats. Email your submissions to We suggest
to use LNCS LaTeX templates that can be found at (go to "For Authors" and then
"Information for LNCS Editors/Authors")

Proceedings: An informal collection of the papers to be presented will
be distributed at the workshop. Questions regarding the workshop
proceedings should be forwarded to .

**** Important Dates ****

Deadline for submission: October 20, 2006
Decision notification: December 4, 2006
Workshop: January 28, 2007

**** Organizing Committee ****

Workshop Organizers
John Cavazos, University of Edinburgh, UK
Grigori Fursin, INRIA Futurs, France

Program Committee
Matthew Arnold, IBM T.J. Watson Research Center, USA
Francois Bodin, IRISA, France
Calin Cascaval, IBM T.J. Watson Research Center, USA
John Cavazos, Edinburgh University, UK
Albert Cohen, INRIA Futurs, France
Lieven Eeckhout, Ghent University, Belgium
Ari Freund, IBM Haifa Research Lab, Israel
Grigori Fursin, INRIA Futurs, France
Peter Knijnenburg, University of Amsterdam, Netherlands
Sally McKee, Cornell University, USA
Eliot Moss, University of Massachusetts (Amherst), USA
Michael O'Boyle, Edinburgh University, UK
David Padua, University of Illinois at Urbana-Champaign, USA
Devika Subramanian, Rice University, USA
Olivier Temam, INRIA Futurs, France
Matthew J. Thazhuthaveetil, Indian Institute of Science, India
Richard Vuduc, Lawrence Livermore National Laboratory, USA
Chris Williams, Edinburgh University, UK
Ayal Zaks, IBM Haifa Research Lab, Israel

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