CFP: Workshop on Application Specific Processors (WASP 2005, New York, Sep 05)

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CALL FOR PAPERS
          4th Workshop on Application Specific Processors (WASP 2005)


              Held in conjunction with the International Conference on
          Hardware/Software Codesign and System Synthesis (CODES+ISSS)


September 18, 2005, New York Metropolitan Area, USA


WASP 2005 website: http://dna.ucsd.edu/wasp05


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IMPORTANT DEADLINES


    Abstract due: July 11, 2005
    Submission due: July 18, 2005, midnight PST
    Acceptance notification: August 15, 2005
    Final version due: August 30, 2005


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Dramatic embedded processor volumes and associated market segments
force a reevaluation of the best way to satisfy the possibly
conflicting demands placed on processor designs. Domain-specific
embedded processors, such as network, automotive, cellular and others,
present interesting architectural refinements, albeit at the cost of
splintering the embedded processor market. Reprogrammable and/or
reconfigurable embedded processors provide an alternative approach,
capable of delivering single, fixed-silicon architectures, thus
amortizing design and manufacturing costs across large volumes, yet
necessitating an answer to the challenge of effective customization of
embedded processors.


The workshop papers explore (micro)architectural design approaches and
trade-offs and compiler technologies, for both domain-specific and
customizable embedded processors. The workshop aims at generating a
forum wherein the various approaches to address the twin challenges of
cost amortization over large volumes while delivering optimal cost,
performance, and power characteristics for a wide segment of embedded
processor market niches will be explored and compared. WASP explores
emerging trends and novel concepts in application-specific
processors. Major topics include, but are not limited to:


    * Domain-specific processors (Network, multimedia, etc.)
    * Application-specific hardware accelerators
    * Microarchitectural customization techniques
    * (Re)configurable processor architectures
    * Dynamically reconfigurable processors (Microarchitectural,
        Coarse-grained, FPGA, etc.)
    * Application-specific processors in System-on-a-chip (SOC)
    * Application-specific customizations for low-power
    * Compiler techniques for processor customization
    * OS and Middleware support for application-specific processors


The Program Committee invites authors to submit papers up to 8 pages
in length, describing original, unpublished recent work. Clearly
describe the nature of the work, explain its significance, highlight
novel features, and describe its current status. Electronic
submission through the workshop website is required.


The submission of a paper proposal will be considered evidence that
upon acceptance the author(s) will present their paper at the
workshop. Final versions of accepted papers will be included in the
Workshop of Application Specific Processors Digest.


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WORKSHOP ORGANIZERS


    General Chair: Peter Petrov, U Maryland
    Program Chair: Alex Orailoglu, UC San Diego
    Special Sessions Chair: Faraydon Karim, STM
    Publicity Chair: Paolo Ienne, EPFL
    E-Media Chair: Ismet Bayraktaroglu, Sun
    Publication Chair: Suleyman Sair, NCSU
    Special Issue Chair: Scott Mahlke, U Michigan


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PROGRAM COMMITTEE


    Pai Chou, UC Irvine
    Apostolos Dollas, Tech U of Crete
    Nikil Dutt, UC Irvine
    Krisztian Flautner, ARM
    Daniel Gajski, UC Irvine
    Haldun Hadimioglu, Polytechnic U
    Joerg Henkel, U Karlsruhe
    Bruce Jacob, U Maryland
    Hans Jacobson, IBM
    Mahmut Kandemir, Penn State U
    Fadi Kurdahi, UC Irvine
    Peter Marwedel, U Dortmund
    Dror Maydon, Tensilica
    Vojin Oklobdzija, UC Davis
    Sri Parameswaran, U New South Wales
    JoAnn M. Paul, CMU
    Michael Schulte, U Wisconsin-Madison
    Yankin Tanurhan, Actel
    Stamatis Vassiliadis, Delft U
    Nakamura Yukihiro, Kyoto U


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Paolo Ienne
WASP 2005 Publicity Chair
EPFL


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