Re: virtual machine efficiency

"ed_davis2" <ed_davis2@yahoo.com> schreibt:
>Is there a way I can have both fast loading of operands, and small
>byte-code size?


Some ideas:


1) Align arguments to word boundaries.


You can align the arguments to the next word boundary, e.g. by
inserting NOP instruction bytes, or by SKIP1 until SKIPn instructions
that "jump" forward immediately to the next instruction byte, residing
just before the word boundary.


It also will be possible to have multiple opcodes for the same
instructions, which take arguments, with each of these instructions
including an specific increment of the PC to the next word boundary
before fetching the argument from that address. This will move the
calculation of the increment from runtime (interpretation) into
"compile" time, when the code is stored in memory.


But I assume that processing these instructions, or calculating the
address of the next word boundary, or even constructing the value from
multiple byte fetches, will take much more time than reading a
misaligned argument from memory. The excess data from the added fetch
typically will still be available (in the cache) when the next
instruction is read, so that IMO the penalty of a misaligned read is
neglectable, in detail in an almost sequential access to the data.


2) Separate arrays for byte code and word arguments.


I also thought of separate code and argument areas, as John suggests,
but then all jumps and calls must specify the addresses or indices in
both areas, what again increases the memory usage and the time to
handle the duplicate position counters. In addition more delays may
occur for fetching data from different (nonsequential) addresses.


Even if I know that on some machines misaligned reads are expensive,
does anybody know of a concrete machine where reading a misaligned
"word" will definitely take longer than reading the according number
of individual bytes???


DoDi

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