CFP: Workshop on Application Specific Processors (WASP 2004) (Stockholm, Sep 04)

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Call For Papers
3rd Workshop on Application Specific Processors (WASP 2004)


Held in conjunction with the International Conference on
Hardware/Software Codesign and System Synthesis, (CODES+ISSS),
September 7, 2004, Stockholm, Sweden


Abstract due: July 1, 2004
Submission due: July 8, 2004
Acceptance notification: August 1, 2004
Final version due: August 15, 2004


Website: http://dna.ucsd.edu/wasp04


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The dramatic embedded processor volumes and the associated market
segments force a reevaluation of the best way to satisfy the possibly
conflicting demands placed on processor designs. Domain-specific
embedded processors, such as network, automotive, cellular and others,
present interesting architectural refinements, albeit at the cost of
splintering the embedded processor market. Reprogrammable and/or
reconfigurable embedded processors provide an alternative approach,
capable of delivering single, fixedsilicon architectures, thus
amortizing design and manufacturing costs across large volumes, yet
necessitating an answer to the challenge of effective customization
of embedded processors.


The workshop papers explore (micro)architectural design approaches
and trade-offs and compiler technologies, for both domain-specific
and customizable embedded processors. The workshop aims at generating
a forum wherein the various approaches to address the twin challenges
of cost amortization over large volumes while delivering optimal cost,
performance, and power characteristics for a wide segment of embedded
processor market niches will be explored and compared. WASP explores
emerging trends and novel concepts in application-specific processors.
Major topics include, but are not limited to:


        * Domain-specific processors (Network, multimedia, etc.)
        * Application-specific hardware accelerators
        * Microarchitectural customization techniques
        * (Re)configurable processor architectures
        * Dynamically reconfigurable processors (Microarchitectural,
                                          Coarse-grained, FPGA, etc.)
        * Application-specific processors in System-on-a-chip (SOC)
        * Application-specific customizations for low-power
        * Compiler techniques for processor customizations
        * OS and Middleware support for application-specific processors




General Chair: Faraydon Karim, ST Micro
Technical Program Chair: Peter Petrov, UC San Diego
Publicity Chair: Scott Mahlke, U Michigan
E-Media Chair: Ismet Bayraktaroglu, SUN
Publication Chair: Paolo Ienne, EPFL
Special Issue: Alex Veidenbaum, UC Irvine
Special Sessions: Fadi Kurdahi, UC Irvine


Technical Program Committee:
Tarek Abdelrahman, U Toronto
Pradip Bose, IBM
Kiyoung Choi, Seoul National U
Pai Chou, UC Irvine
Ed Deprettere, Leiden U
Nikil Dutt, UC Irvine
Carl Ebeling, U Washington
Eric Flamand, ST Micro
Krisztian Flautner, ARM
Daniel Gajski, UC Irvine
Joerg Henkel, U Karlsruhe
Vojin Oklobdzija, UC Davis
Sri Parameswaran, U New South Wales
JoAnn M. Paul, CMU
Majid Sarrafzadeh, UCLA
Cristina Silvano, Politecnico di Milano
Paco Tirado, U Complutense de Madrid
Stamatis Vassiliadis, Delft U
Hiroto Yasuura, Kyushu U

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