Related articles |
---|
Def use chain length minimization sumesh_uk@hotmail.com (2003-10-27) |
RE: Def use chain length minimization naveens@noida.hcltech.com (Naveen Sharma, Noida) (2003-10-31) |
From: | sumesh_uk@hotmail.com (sumesh) |
Newsgroups: | comp.compilers |
Date: | 27 Oct 2003 16:12:32 -0500 |
Organization: | http://groups.google.com |
Keywords: | optimize, question |
Posted-Date: | 27 Oct 2003 16:12:31 EST |
Hi
Can some body point me to any literature on minimizing def-use
chains so that there is no cache miss between them. In other words can
load stores be scheduled so that they are close enough of course no
more closer than the latency of the load.
-Sumesh
Return to the
comp.compilers page.
Search the
comp.compilers archives again.