C compiler for PDP-11 sought, optimizing for size in general

leob@mailcom.com
23 Sep 2003 12:58:19 -0400

          From comp.compilers

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C compiler for PDP-11 sought, optimizing for size in general leob@mailcom.com (2003-09-23)
Re: C compiler for PDP-11 sought, optimizing for size in general jthorn@aei.mpg.de (Jonathan Thornburg) (2003-09-23)
Re: C compiler for PDP-11 sought, optimizing for size in general ertr1013@student.uu.se (Erik Trulsson) (2003-09-27)
Re: C compiler for PDP-11 sought, optimizing for size in general Jeffrey.Kenton@comcast.net (Jeff Kenton) (2003-09-27)
Re: , optimizing for size in general, was C compiler for PDP-11 sought xleobx@qmailcomq.com (2003-10-04)
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From: leob@mailcom.com
Newsgroups: comp.compilers
Date: 23 Sep 2003 12:58:19 -0400
Organization: Verio
Keywords: C, comment
Posted-Date: 23 Sep 2003 12:58:19 EDT

Dear compiler specialists,


I am looking for an optimizing compiler that can take ANSI C (I know
about unprotoize, so a K&R C compiler will do) and produces PDP-11
assembly code that is optimized for size rather than for speed.


I have looked at the legacy compilers; the V7 ccom is no good,
PCC-based compilers (e.g. one used in 2.11 BSD) are slightly better
but not much better (omitting frame pointer is not possible), and the
GCC port for PDP-11 is unfinished. It is hard to believe that there
was no decent C compiler for PDP-11.


But even if the GCC port had been finished, the way GCC optimizes for
size is quite lightweight: the impact of forcing a variable or an
address into a register is not analyzed wrt the code size, to start
with: try compiling


void foo() {
                extern int a;
                if(++a) ++a;
}


with various options for i386 to see what I'm talking about;
no way you can make it produce


foo: addl $1,a
                je .L1
                addl $1,a
..L1: ret


the best I got is (-O4 -Os)
foo:
                movl a, %edx
                leal 1(%edx), %eax
                testl %eax, %eax
                movl %eax, a
                je .L1
                leal 2(%edx), %eax
                movl %eax, a
..L1:
                ret




so it would not have been of much help either. Where did the basic
block tail merging go, by the way? If I'm specifically asking to
optimize for size, what's with duplicated "movl %eax, a"?


I admit that my interest in PDP-11 is rather for a hack value, but
overall, concentrating mostly on instruction parallelism and not
paying much attention to the I-cache effects does not seem like a
particularly good idea (*cough*P4 I-cache size*cough*)


Thanks,
Leo
[I cache? On a PDP-11? You must be kidding. The Ritchie PDP-11
compiler generated pretty good code, but you did have to give it
register declarations to help it along. -John]


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