ICS'03 Advance Program; Hotel and Registration Reminder (San Francisco, Jun 03)

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                                          ICS'03 Call for Participation
                The 2003 ACM International Conference on Supercomputing
                                        San Francisco, CA June 21-June 26, 2003
                                          http://www.csit.fsu.edu/ics03/
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Dear Colleague:


The preliminary program for ICS'03 is now available online at
http://www.csit.fsu.edu/ics03/ . Early registration is now open for
the 2003 International Conference on Supercomputing (ICS'03) which
will be held at the Crowne Plaza Union Square from June 21-26, 2003 in
San Francisco. We have negotiated a special rate for conference
participants and we advise you to make your reservation at the Crowne
Plaza Union Square by May 20 to take advantage of these great rates.
When making your reservations, please indicate to the hotel that you
are attending ICS'03. Please refer to our website at
http://www.csit.fsu.edu/ics03/ for additional information about hotel
reservations.


ICS'03 is the premier scientific conference on supercomputing and its
applications. Please find enclosed the preliminary program. In
addition to the technical papers, ICS'03 will feature two keynote
speakers from industry and academia, by Richard Wirt of Intel and
Prof. Jim Smith of the Univ. of Wisconsin.


ICS'03 has two workshops on topics of high interest representing
high-performance architecture for supercomputing, and applications of
supercomputing: "Exploring the trace space for dynamic optimization
techniques" and "The International Workshop on e-Science". There will
also be 5 exciting tutorials of interest to the supercomputing
community on grid computing, InfiniBand, OpenMP implementation and
performance, advanced compilation techniques and statistical
performance techniques.


The early registration deadline is May 31, 2003. As workshops and
tutorials are subject to a minimum participation requirement, please
register early. For more information about the Crowne Plaza Union
Square, please visit http://www.csit.fsu.edu/ics03 - We are looking
forward to seeing you in San Francisco!


Dr. Michael Gschwind
ICS '03 Publicity Chair
IBM T.J. Watson Research Center
Yorktown Heights, NY






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                                          ACM ICS'03 Preliminary Program


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(All sessions are located in Crowne Plaza Union Square. )


Saturday, June 21, 2003
=======================


Workshop #1 (Full-day)
Title: "Exploring the trace space for dynamic optimization techniques"
Organizers: Bruce Childers, childers@cs.pitt.edu, University of Pittsburgh
Felipe Maia Galvao Franca, felipe@cos.ufrj.br, UFRJ, Brazil
Workshop description: http://www.cs.pitt.edu/traces


Workshop #2 (Full-day)
Title: "The International Workshop on e-Science"
Organizers: Frank Wang, f.wang@londonmet.ac.uk, London Metropolitan University, UK
Workshop description: http://www2.unl.ac.uk/~wangf/ACMESGS03






Sunday, June 22, 2003
=====================


Tutorial #1 (Half-day)
Title: "Service-Oriented Grid Computing"
Speaker: Rajkumar Buyya, raj@cs.mu.oz.au, The University of Melbourne, Australia
Tutorial description: http://www.csit.fsu.edu/ics03/wt_desc.html#tut1


Tutorial #2 (Half-day)
Title: "InfiniBand: Is it Ready for Prime-Time High Performance Computing (HPC)?"
Speaker: Dhabaleswar K. Panda, panda@cis.ohio-state.edu, The Ohio State University
Tutorial description: http://www.csit.fsu.edu/ics03/wt_desc.html#tut2


Tutorial #3 (Half-day)
Title: "OpenMP implementation and performance issues"
Speakers: Mats Brorsson, Mats.Brorsson@imit.kth.se, Royal Institute of Technology, KTH, Sweden
Sven Karlsson, Sven.Karlsson@imit.kth.se, Royal Institute of Technology, KTH, Sweden
Tutorial description: http://www.csit.fsu.edu/ics03/wt_desc.html#tut3


Tutorial #4 (Half-day)
Title: "Advanced compilation techniques for the Intel(R) Itanium(R) Processor Family"
Speakers: Gerolf Hoflehner, gerolf.f.hoflehner@intel.com, Intel Compiler Labs, Santa Clara, CA
Dattraya Kulkarni, dattatraya.kulkarni@intel.com, Intel Compiler Labs, Santa Clara, CA
Tutorial description: http://www.csit.fsu.edu/ics03/wt_desc.html#tut4


Tutorial #5 (Half-day)
Title: "Statistical Techniques for Performance Engineers"
Speaker: David J. Lilja, lilja@ece.umn.edu, University of Minnesota
Tutorial description: http://www.csit.fsu.edu/ics03/wt_desc.html#tut5






Monday, June 23, 2003
=====================


Keynote 1 (Monday 9:00-10:00)
Richard Wirt, Intel Corporation


Processor Microarchitecture I (Monday, 10:30-12:00)


* "Selecting Long Atomic Traces for High Coverage".
      Roni Rosner, Moffie Micha, Yiannakis Sazeides, Ronny Ronen.
* "Recycling Waste: Exploiting Wrong-Path Execution to Improve Branch
      Prediction".
      Haitham Akkary, Srikanth Srinivasan, Konrad Lai.
* "Partitioned First-Level Cache Design for Clustered Microarchitectures".
      Paul Racunas, Yale Patt.


Compilers I (Monday, 13:30-15:30)
* "A Fast Approximate Interprocedural Analysis for Speculative Multithreading
      Compilers".
      Anasua Bhowmik, Manoj Franklin.
* "Compiler Support for Efficient Processing of XML Datasets".
      Xiaogang Li, Renato Ferreira, Gagan Agrawal.
* "A Framework for Incremental Extensible Compiler Construction".
      Steven Carroll, Constantine Polychronopoulos.
* "A Performance Analysis of the Berkeley UPC Compiler".
      Wei-Yu Chen, Dan Bonachea, Jason Duell, Parry Husbands, Costin Iancu,
      Katherine Yelick




Tuesday, June 24, 2003
======================


Keynote 2 (Tuesday, 8:45-9:45)
James E. Smith, University of Wisconsin


Power (Tuesday, 10:15-12:15)
* "A Compiler Approach for Reducing Data Cache Energy".
      W. Zhang, M. Karakoy, M. Kandemir, G. Chen.
* "Conserving Disk Energy in Network Servers".
      Enrique V. Carrera, Eduardo Pinheiro, Ricardo Bianchini.
* "PowerHerd: Dynamic Satisfaction of Peak Power Constraints in
      Interconnection Networks".
      Li Shang, Li-Shiuan Peh, Niraj K. Jha.
* "Predictive Dynamic Thermal Management for Multimedia Applications".
      Jayanth Srinivasan, Sarita V. Adve.


Performance Evaluation (Tuesday, 13:45-15:45)
* "Evaluation of the Memory Page Migration Influence in the System
      Performance: The case of the SGI O2000".
      Julita Corbalan, Xavier Martorell, Jesus Labarta.
* "Modeling and Optimization of Non-Blocking Checkpointing for Optimistic
      Simulation on Myrinet Clusters".
      Francesco Quaglia, Andrea Santoro.
* "Performance Characteristics of OpenMP Constructs, and Application
      Benchmarks on a Large Symmetric Multiprocessor".
      Nathan R. Fredrickson, Ahmad Afsahi, Ying Qian.
* "Estimating Cache Misses and Locality using Stack Distances".
      Calin Cascaval.


Processor Microarchitecture II (Tuesday, 16:15-17:45)
* "The AEGIS Processor Architecture for Tamper-Evident and Tamper-Resistant
      Processing".
      G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten van Dijk,
      Srinivas Devadas.
* "Reducing Register Ports Using Delayed Write-Back Queues And Operand
      Pre-Fetch".
      Nam Sung Kim, Trevor Mudge.
* "Predicate Prediction for Efficient Out-of-order Execution".
      Weihaw Chuang, Brad Calder.




Wednesday, June 25, 2003
========================


Compilers II (Wednesday, 8:30-10:00)
* "A GSA-based Compiler Infrastructure to Extract Parallelism from
      Complex Loops".
      Manuel Arenaz, Juan Touriņo, Ramon Doallo.
* "The Impact of Data Dependence Analysis on Compilation and Program
      Parallelization".
      Kleanthis Psarris, Konstantinos Kyriakopoulos.
* "Inter-Procedural Stacked Register Allocation for Itanium Like
      Architecture".
      Liu Yang, Sun Chan, G. R. Gao, Roy Ju, Guei-Yuan Lueh, Zhaoqing Zhang.


Fault Tolerance (Wednesday, 10:30-11:30)
* "Result Checking in Global Computing Systems".
      Cecile Germain-Renaud.
* "Collective Operations in an Application-level Fault Tolerant MPI System".
      Greg Bronevetsky, Daniel Marques, Keshav Pingali, Paul Stodghill.


I/O (Wednesday, 11:30-12:30)
* "Placement of I/O Servers to Improve Parallel I/O Performance on
      Switch-Based Clusters".
      Jan-Jan Wu, Da-Wei Wang, Yih-Fang Lin.
* "Profile Guided I/O Partitioning".
      Yijian Wang, David Kaeli.


Parallel Architectures (Wednesday, 14:00-16:00)
* "miNI: Reducing Network Interface Requirements with Dynamic Handle Lookup".
      Reza Azimi, Angelos Bilas.
* "Inferential Queueing and Speculative Push for Reducing Critical
      Communication Latencies".
      Ravi Rajwar, James R. Goodman, Alain Kagi.
* "Automatic Fence Insertion for Shared Memory Multiprocessing".
      Xing Fang, Jaejin Lee, Samuel P. Midkiff.
* "High Performance RDMA-Based MPI Implementation over InfiniBand".
      Jiuxing Liu, Jiesheng Wu, Sushmitha P. Kini, Pete Wyckoff,
      Dhabaleswar K. Panda.




Thursday, June 26, 2003
=======================


Speculative Execution (Thursday, 8:30-10:00)
* "A New Speculation Technique to Optimize Floating-Point Performance
      while Preserving Bit-by-Bit Reproducibility".
      Mikio Takeuchi, Hideaki Komatsu, Toshio Nakatani.
* "Dynamic Memory Instruction Bypassing".
      Daniel Ortega, Mateo Valero, Eduard Ayguade.
* "Enhancing Memory Level Parallelism via Recovery-Free Value Prediction".
      Huiyang Zhou, Thomas M. Conte.


Applications and Problem Solving Environments (Thursday, 10:30-12:30)
* "Enhancing Scalability of Parallel Structured AMR Calculations".
      Andrew M. Wissink, David Hysom, Richard D. Hornung.
* "A High Performance Multi-Perspective Vision Studio".
      Eugene Borovikov, Alan Sussman, Larry Davis.
* "Roccom: An Object-Oriented, Data-Centric Software Integration Framework
      for Multiphysics Simulations".
      Xiangmin Jiao, Michael T. Campbell, Michael T. Heath.
* "A Scalable Fully Implicit Algorithm for Simulating the Electrical
      Activation of the Heart".
      Maria Murillo, Xiao-Chuan Cai.

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