Related articles |
---|
[3 earlier articles] |
Re: Selective Computation... joachim_d@gmx.de (Joachim Durchholz) (2002-12-31) |
Re: Selective Computation... thp@cs.ucr.edu (2003-01-17) |
Re: Selective Computation... Patrick.Volteau@st.com (Patrick Volteau) (2003-01-20) |
Re: Selective Computation... strohm@airmail.net (John R. Strohm) (2003-01-21) |
Re: Selective Computation... andreas.gieriet@externsoft.ch (Andreas Gieriet) (2003-01-21) |
Re: Selective Computation... liekweg@freenet.de (Florian Liekweg) (2003-01-21) |
Re: Selective Computation... marcov@toad.stack.nl (Marco van de Voort) (2003-02-06) |
From: | Marco van de Voort <marcov@toad.stack.nl> |
Newsgroups: | comp.compilers |
Date: | 6 Feb 2003 00:04:41 -0500 |
Organization: | Eindhoven University of Technology, The Netherlands |
References: | 02-12-116 03-01-077 03-01-102 |
Keywords: | architecture |
Posted-Date: | 06 Feb 2003 00:04:41 EST |
John R. Strohm wrote:
> The Texas Instruments floating-point DSP (320C30/C40, for example) have
> conditional load (and, I think, store) instructions. The compilers for
> these machines know about them and use them for this sort of thing. The
> 'C30/'C40 compilers are also very careful about branch scheduling.
Isn't conditional MOV (cmov) one of the few P6+ instructions?
Return to the
comp.compilers page.
Search the
comp.compilers archives again.