Compiler positions available for week ending November 17

This is a digest of ``help wanted'' and ``position available'' messages
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Date: 14 Nov 2002 13:43:02 -0800
From: "Chris Lewis" <Chris@n2tech.com>
Subject: Sr. Compiler Engineer - EDA, HDL, RTL, Synthesis - San Jose, CA
Organization: N2 Technologies


Sr. Compiler Engineer


We need someone with strong skills in Algorithm Design, and Compiler
Development to design a compiler for a "state of the art" Verilog RTL
hardware engine. As a member of a small team of software and hardware
developers, you will help to design, develop and refine the compiler.


Must have in-depth skills and work experience in all of the following:
Algorithms and Data Structures
OO Design
C++


MS CS or equivalent with 6+ years of experience with large software projects
Compiler development - language independent optimizations, flow analysis
Software development experience in a Unix environment
Experience in developing graph algorithms
Experience in developing compiler backends


We would prefer to see candidates with the following experience:
EDA Software Development
Knowledge of Verilog Semantics and Simulation Algorithms
(Simulation - HDL Compiler for RTL/Behavioral code (not gates))
(Synthesis - RTL inference, Behavioral
synthesis)
Scheduling Algorithms
Dataflow Analysis


Interested parties, please submit your resume as an attachment in Word
format and we will give you a call once we have a chance to review it.
US Candidates only and local candidates given preference.


Chris Lewis
Technical Recruiter
N2 Technologies
Tel 650-493-1500
Fax 650-493-1520
chris@n2tech.com
http://www.n2tech.com

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