Re: Machine descriptions for code generation?

"Gert Goossens" <"goossens@retarget.com"@telenet-ops.be>
25 Oct 2002 00:14:51 -0400

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Machine descriptions for code generation? eml.riverside-machines.com@eu.uu.net (Evan Lavelle at dot) (2002-10-13)
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Re: Machine descriptions for code generation? "goossens@retarget.com"@telenet-ops.be (Gert Goossens) (2002-10-25)
Re: Machine descriptions for code generation? eml@riverside-machines.com (Evan Lavelle) (2002-11-06)
Re: Machine descriptions for code generation? gopi@sankhya.com (Gopi Bulusu) (2002-11-08)
| List of all articles for this month |
From: "Gert Goossens" <"goossens@retarget.com"@telenet-ops.be>
Newsgroups: comp.compilers
Date: 25 Oct 2002 00:14:51 -0400
Organization: Target Compiler Technologies
References: 02-10-035
Keywords: architecture
Posted-Date: 25 Oct 2002 00:14:50 EDT

Evan,


What you seem to be looking for is commercially available from my
company, Target Compiler Technologies.


We offer a retargetable tool-suite called Chess/Checkers. It consists
of a C compiler, an assembler/disassembler, a linker, an
instruction-set simulator/debugger (with support for profiling,
multi-processor architectures, on-chip debugging...) and an RT-level
HDL generator. All tools are retargetable from a single model of the
processor, in the nML processor description language.


For more info please have a look at www.retarget.com.


Regards,


Gert Goossens
Target Compiler Technologies


--
____________ _______________________________________________________________


### ###### # Gert Goossens
### #### ### Target Compiler Technologies n.v. Phone: +32-16-40 81 14
        ## Haasrode Research Park Fax: +32-16-40 53 00
_ _ ## _ Technologielaan 11-0002 E-mail: goossens@retarget.com
___ #### ___ B-3001 Leuven, Belgium WWW: http://www.retarget.com


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