Re: compiler for asynchronous DSP core

"Mike Rosing" <rosing@neurophys.wisc.edu>
24 Aug 2002 11:58:31 -0400

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Related articles
compiler for asynchronous DSP core nixxlizzie@yahoo.com (Lizzie Ni) (2002-07-31)
Re: compiler for asynchronous DSP core rosing@neurophys.wisc.edu (Mike Rosing) (2002-08-04)
Re: compiler for asynchronous DSP core nixxlizzie@yahoo.com (Lizzie Ni) (2002-08-23)
Re: compiler for asynchronous DSP core rosing@neurophys.wisc.edu (Mike Rosing) (2002-08-24)
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From: "Mike Rosing" <rosing@neurophys.wisc.edu>
Newsgroups: comp.cog-eng,comp.dsp,comp.compilers,comp.realtime,comp.arch
Date: 24 Aug 2002 11:58:31 -0400
Organization: University of Wisconsin, Madison
References: 02-07-139 02-08-009 02-08-074
Keywords: DSP, architecture
Posted-Date: 24 Aug 2002 11:58:31 EDT

Lizzie Ni wrote:
> Here is the link to give everybody a clear idea on what the
> asynchronous DSP core is.
> www.cs.man.ac.uk/amulet/publications/ papers/prep00.html
>
> Is there any special points that we need to notice for writing a
> compiler for an asynchronous DSP core?


Being able to deal with circular buffers and saturation logic would
be nice.


> BTW, Do Motorola and TI dsp support lock interface in their
> architectures?


TI does, see the ldii and similar instructions in the C3x and C4x
series. I haven't looked at Mot chips in a long time unfortunatly.


Patience, persistence, truth,
Dr. mike


--
Mike Rosing
www.beastrider.com BeastRider, LLC
SHARC debug tools


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