Related articles |
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[8 earlier articles] |
Re: Processor specific optimisations RLWatkins@CompuServe.Com (R. L. Watkins) (2002-01-24) |
Re: Processor specific optimisations mpointie@eden-studios.fr (Mickaël Pointier) (2002-01-28) |
Re: Processor specific optimisations rickh@capaccess.org (2002-01-28) |
Re: Processor specific optimisations mpointie@eden-studios.fr (Mickaël Pointier) (2002-01-30) |
Re: Processor specific optimisations Ulrich.Teichert@gmx.de (2002-01-30) |
Re: Processor specific optimisations perle@cs.tu-berlin.de (2002-01-30) |
Re: Processor specific optimisations mpointie@eden-studios.fr (Mickaël Pointier) (2002-02-06) |
Re: Processor specific optimisations clc5q@cs.virginia.edu (Clark L. Coleman) (2002-02-06) |
Re: Processor specific optimisations rickh@capaccess.org (2002-02-06) |
From: | "Mickaël Pointier" <mpointie@eden-studios.fr> |
Newsgroups: | comp.compilers |
Date: | 6 Feb 2002 23:21:17 -0500 |
Organization: | ImagiNET / Colt Internet |
References: | 02-01-077 02-01-126 02-01-151 02-01-160 |
Keywords: | architecture, optimize |
Posted-Date: | 06 Feb 2002 23:21:17 EST |
> [There are lots of CISC instruction sets with instructions that compilers
> never use because it's faster to use several simpler ones. The x86
> ENTER instruction is a good example. -John]
You can also consider the bitfield manipulation on the 68030, that in
general takes a lot more time to execute than the equivalent sequence
of and, or, xor and negs.
Mickael Pointier
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