New "letter" format journal: Computer Architecture Letters

Call for Papers
                                            announcing the launch of


                  ********** Computer Architecture Letters *********
                  ***** A refereed forum for technical letters *****




Beginning with the January, 2002 issue, the Newsletter of the TCCA is
changing name and focus. Computer Architecture Letters will be a
quarterly forum for short, critically refereed, technical "letters",
with an emphasis on rapid review and publication. Accepted letters
will be published immediately on the TCCA website and in the next
available paper issue. We are seeking immediate submissions for our
inaugural issue in January.


All submissions must consist of original work. Submitted letters must
be four pages or fewer, including all figures, tables, and references.
Submissions exceeding this length will be returned without review.
Papers should use 8.5in x 11in (21.55cm x 28cm) paper with 1-in
(2.5cm) margins, 10-pt. or larger font, and single spacing. Please
submit electronically in postscript or PDF, and ensure that the
submitted file can be viewed in ghostview or Acrobat Reader 3.0. No
hard copy is necessary.


Submissions will be accepted on a continuing basis, but to ensure
publication in the January issue, manuscripts should be submitted by
Dec. 21, 2001. Authors should direct their submissions to the TCCA
website at http://www.computer.org/tab/tcca/ and each submission will
be assigned to an appropriate member of the Editorial Board to manage
the review process. Upon acceptance, a standard IEEE copyright release
will be required. For questions, please send e-mail to
tcca@cs.virginia.edu.


Submissions are welcomed on any topic in computer architecture,
especially but not limited to:
    - Microprocessor and multiprocessor systems
    - Microarchitecture and ILP processors
    - Workload characterization
    - Performance evaluation and simulation techniques
    - Compiler-hardware and operating system-hardware interactions
    - Interconnect architectures
    - Memory and cache systems
    - Power and thermal issues at the architecture level
    - I/O architectures and techniques
    - Independent validation of previously published results
    - Analysis of unsuccessful techniques
    - Network and embedded-systems processors
    - Real-time and high-availability architectures
    - Reconfigurable systems




                      CAL is published by the IEEE Computer Society
                      Technical Committee on Computer Architecture




Editor-in-Chief
  Yale N. Patt, The Univ. of Texas at Austin


Associate Editor-in-Chief
    Kevin Skadron, Univ. of Virginia


Editorial Board
    Dharma P. Agrawal, Univ. of Cincinnati
    Doug DeGroot, Leiden Univ.
    Jose Duato, Technical Univ. of Valencia
    Joseph A. Fisher, Hewlett-Packard Laboratories
    Mark A. Franklin, Washington Univ.
    Michael Flynn, Stanford
    Greg Ganger, Carnegie-Mellon Univ.
    Jean-Luc Gaudiot, Univ. of Southern California
    Allan Gottlieb, New York Univ.
    John Gurd, Univ. of Manchester
    Mark Hill, Univ. of Wisconsin
    Wen-mei Hwu, Univ. of Illinois at Urbana-Champaign
    Norman P. Jouppi , Compaq WRL
    David R. Kaeli, Northeastern Univ.
    Rami G. Melhem, Univ. of Pittsburgh
    Yale N. Patt, The Univ. of Texas at Austin
    Ronny Ronen, Intel
    Issac Scherson, Univ. of California - Irvine
    Gabriel M. Silberman, IBM
    Guri Sohi, Univ. of Wisconsin
    Per Stenstrom, Chalmers
    Josep Torellas, Univ. of Illinois at Urbana-Champaign
    Mateo Valero, Univ. Politecnica de Catalunya
    Stamatis Vassiliadis, Tech. Univ. of Delft
    Uri Weiser, Intel


TCCA Chair
    Jean-Luc Gaudiot, Univ. of Southern California

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