CASES 2001 Advance Program (Atlanta, Nov 16-17)

"Kenneth M. Mackenzie" <>
5 Nov 2001 00:04:12 -0500

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CASES 2001 Advance Program (Atlanta, Nov 16-17) (Kenneth M. Mackenzie) (2001-11-05)
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From: "Kenneth M. Mackenzie" <>
Newsgroups: comp.compilers
Date: 5 Nov 2001 00:04:12 -0500
Organization: Compilers Central
Keywords: conference
Posted-Date: 05 Nov 2001 00:04:12 EST


                                                      CASES 2001
                                    International Conference on
          Compilers, Architectures and Synthesis for Embedded Systems


                                              November 16-17, 2001
                                                Grand Hyatt Atlanta
                                                  Atlanta, GA, USA

                                                    IMPORTANT DATES

                                CUTOFF DATE FOR ONLINE REGISTRATION:
                                                  NOVEMBER 11, 2001

                                NOVEMBER 15, 2001 (Thu) 7pm to 9pm
                                NOVEMBER 16, 2001 (Fri) 7:30am to 8:30am

                                  (Normal rates only thereafter)


    The ACM has just started a new Transactions on Embedded Computing
    Systems (TECS). For information on how to submit to TECS, see the
    TECS Web site: There will be a
                        Special Issue based on the theme of CASES2001.


                                      The CASES 2001 proceedings will
                                  be placed in the ACM Digital Library


                                                CONFERENCE HIGHLIGHTS


                                                        INVITED TALKS

                                        November 16 (Fri) 9am to 10am

                                      A VISION FOR EMBEDDED SOFTWARE
                                      Alberto Sangiovanni-Vincentelli
                                  University of California at Berkeley
                                            and Cadence Design Systems

                                        November 17 (Sat) 9am to 10am

                                                        Tom Adelmeyer
                                                    Intel Corporation


                                                      PANEL DISCUSSION

                                      November 16 (Fri) 5:15pm to 6:15pm

              Moderator: Rob Schreiber, Hewlett-Packard Labs
              Panelists: Roger Bringmann, Star*Core, Agere Systems
                                    Elizabeth Mynatt, Georgia Institute of Technology
                                    Rick Stevens, Argonne National Laboratory


                                                PERSPECTIVES SESSIONS

                                    November 17 (Sat) 1:30pm to 2:30pm

                                                      POWER MANAGEMENT

                                    November 17 (Sat) 2:30pm to 3:30pm

                                                  ELECTRONIC TEXTILES


                                                      ADVANCE PROGRAM

                                          NOVEMBER 15, 2001 (Thursday)

                7pm-9pm Pre-registration


                                            NOVEMBER 16, 2001 (Friday)

                BREAKFAST - 8:00am - 9:00 am

                Invited Talk - 9:00am - 10:am

                                A VISION FOR EMBEDDED SOFTWARE
                                Alberto Sangiovanni-Vincentelli, University of California
                                at Berkeley and Cadence Design Systems

                COFFEE BREAK - 10:00am - 10:15am

                Session 1: Caches and Memory Systems (10:15am - 12:00pm)

            * "Establishing a Tight Bound on Task Interference in Embedded
                System Instruction Caches", Harry Dwyer and John Fernando,
                Agere Systems.

            * "Storage Allocation for Embedded Processors", Jan Sjodin, IAR
                Systems, Sweden and Carl von Platen, Uppsala University, Sweden.

            * "Patchable Instruction ROM Architecture", Timothy Sherwood and
                Brad Calder, University of California, San Diego.

            * "Heterogeneous Memory Management for Embedded Systems", Oren
                Avissar and Rajeev Barua, University of Maryland at College
                Park and Dave Stewart, Embedded Research Solutions, LLC.

            * "Transparent Data-Memory Organizations for Digital Signal
                Processors", Sadagopan Srinivasan, Vinodh Cuppu and Bruce
                Jacob, University of Maryland at College Park.

                LUNCH BREAK - 12:00pm - 1:30pm

                Session 2: Compilers and Optimization (1:30pm to 3:15pm)

            * "A New Method for Compiling Schizophrenic Synchronous
                Programs", Klaus Schneider and M. Wenz, University of
                Karlsruhe, Germany.

            * "An Empirical Evaluation of High Level Transformations for
                Embedded Processors", Bjorn Franke and Michael O'Boyle,
                University of Edinburgh, UK

            * "Combined Partitioning and Data Padding for Scheduling
                Multiple Loop Nests", Zhong Wang, University of Notre Dame and
                Edwin H.-M. Sha, University of Texas at Dallas.

            * "A Novel Approach to Code Analysis of Digital Signal
                Processing Systems", Olaf Luethje, Martin Coors, Holger Keding,
                and Heinrich Meyr, Aachen University of Technology, Germany.

            * "The Very Portable Optimizer for Digital Signal Processors",
                Sungjoon Jung and Yunheung Paek, Korea Advanced Institute of
                Science and Technology, Korea.

                COFFEE BREAK - 3:15pm - 3:30pm

                Session 3: Synthesis and Design Tools (3:30pm - 5:15pm)

            * "A Software Development Tool Chain for a Reconfigurable
                Processor", Alberto La Rosa, Luciano Lavagno and Claudio
                Passerone, Politecnico di Torino, Italy.

            * "Hardware Compilation of Sequential ADA", Neil Audsley and
                Michael Ward, University of York, UK.

            * "Design Space Characterization for Architecture/Compiler
                Co-Exploration", Dirk Fischer, Juergen Teich, Michael Thies
                and Ralph Weper, University of Paderborn, Germany.

            * "A Compiler Framework for Mapping Applications to a
                Coarse-grained Reconfigurable Computer Architecture", Girish
                Venkataramani and Walid Najjar, University of California,
                Riverside, Fadi Kurdahi and Nader Bagherzadeh, University of
                California, Irvine and Wim Bohm, Colorado State University.

            * "Pattern Matching in Reconfigurable Logic for Packet
                Classification", Adam Johnson and Kenneth Mackenzie, Georgia
                Institute of Technology.

                PANEL DISCUSSION (5:15pm - 6:15pm)
                "Personal, Handheld, Wireless: The Future of Digital Technology"
                Moderator: Rob Schreiber, Hewlett-Packard Labs
                Panelists: Roger Bringmann, Star*Core, Agere Systems
                                      Elizabeth Mynatt, Georgia Institute of Technology
                                      Rick Stevens, Argonne National Laboratory

                BANQUET - 7:30pm - 9:30pm


                                            NOVEMBER 17, 2001 (Saturday)

                BREAKFAST - 8:00am - 9:00 am

                Invited Talk - 9:00am - 10:am

                                Tom Adelmeyer, Intel Corporation

                COFFEE BREAK - 10:00am - 10:15am

                Session 4: Hardware Support (10:15am - 12:00pm)

            * "Efficient Longest Executable Path Search for Programs with
                Complex Flows and Pipeline Effects", Friedhelm Stappert,
                C-LAB, Germany, Andreas Ermedahl, Uppsala University, Sweden
                and Jakob Engblom, IAR Systems AB, Sweden.

            * "Tailoring Pipeline Bypassing and Functional Unit Mapping to
                Application in Clustered VLIW Architectures", Marcio Buss,
                Rodolfo Azevedo, Paulo Centoducatte and Guido Araujo,
                IC-UNICAMP, Brazil.

            * "System-on-a-Chip Processor Synchronization Hardware Unit with
                Task Preemption Support", Bilge E. Saglam, Jaehwan Lee and
                Vincent J. Mooney, Georgia Institute of Technology.

            * "ShiftQ: A Buffered Interconnect for Custom Loop Accelerators",
                Shail Aditya and Michael Schlansker, Hewlett-Packard

            * "Heads and Tails: A Variable-Length Instruction Format
                Supporting Parallel Fetch and Decode", Heidi Pan and Krste
                Asanovic, Massachusetts Institute of Technology.

                LUNCH BREAK - 12:00pm - 1:30pm

                PERSPECTIVES SESSION: Power Management (1:30pm - 2:30pm)

            * "Power Management in an Embedded Processor: What can a (Poor)
                Compiler Do?", Weng-fai Wong, National University of Singapore.

            * "Application Specific Architectures: A Recipe for Fast,
                Flexible and Power Efficient Designs", Todd Austin, University
                of Michigan.

                PERSPECTIVES SESSION: Electronic Textiles (2:30pm - 3:30pm)

            * "Textiles and Computing: Background and Opportunities for
                Convergence", Sundaresan Jayaraman, Georgia Institute of

            * "A Prototype Network Embedded in a Textile Fabric", Kenneth
                Mackenzie, Eric Hudson, Drew Maule, Sungmee Park and
                Sundaresan Jayaraman, Georgia Institute of Technology.

                COFFEE BREAK - 3:30pm - 3:45pm

                Session 5: Power- and Energy-Aware Computing (3:45pm - 5:55pm)

            * "Algorithms for Energy Optimization Using Processor
                Instructions", Anil Seth, IIT Kanpur, India, Ravindra
                B. Keskar, Sasken Communication Technologies, Ltd., India and
                R. Venugopal, Hewlett-Packard India Software Operations,

            * "The Performance and Energy Consumption of Three Embedded
                Real-Time Operating Systems", Kathleen Baynes, Chris Collins,
                Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit,
                Tiebing Zhang and Bruce Jacob, University of Maryland at
                College Park.

            * "Comparing Power Consumption of SMT DSPs and CMP DSPs for
                Mobile Phone Workloads", Stefanos Kaxiras, Agere Systems,
                Girija Narlikar, Bell Laboratories, Lucent Technologies,
                Alan D. Berenbaum, Agere Systems and Zhigang Hu, Princeton

            * "EDF Scheduling Using Two-mode Voltage-Clock-Scaling for Hard
                Real-Time Systems", Yann-Hang Lee, Arizona State University,
                Yoonmee Doh, University of Florida and C. M. Krishna,
                University of Massachusetts.

            * "Energy-Efficient Instruction Cache Using Page-Based
                Placement", S. Kim, N. Vijaykrishnan, M. Kandemir and
                M. J. Irwin, Pennsylvania State University.

            * "Computation Offloading to Save Energy on Handheld Devices: A
                Partition Scheme", Zhiyuan Li, Cheng Wang and Rong Xu, Purdue



        Steering Committee:

                Guang R. Gao, University of Delaware
                Vinod Kathail, Hewlett-Packard Labs
                Edward Lee, University of California Berkeley
                Krishna V. Palem, Georgia Institute of Technology
                Reid Tatge, Texas Instruments

        General Chair:

                Krishna V. Palem, Georgia Institute of Technology

        Program Co-Chairs:

                Guang R. Gao, University of Delaware
                Trevor Mudge, University of Michigan

        Local Arrangements Vice-Chair:

                Wei Zhao, Star*Core, Agere Systems

        Coordination Vice-Chair

                Shuvra S. Bhattacharyya, University of Maryland

        Panel Vice-Chair:

                Rob Schreiber, Hewlett-Packard Labs

        Publications Vice-Chair:

                Jack Davidson, University of Virginia

        Publicity Vice-Chair:

                Kenneth Mackenzie, Georgia Institute of Technology

        Program Committee:

                Todd Austin, University of Michigan
                Prithviraj Banerjee, Northwestern University
                George Cai, Intel Corporation
                Josh Fisher, Hewlett-Packard Labs
                Mark Franklin, Washington University
                Thomas Gross, ETH Zurich / CMU
                Mary Jane Irwin, Pennsylvania State University
                Bruce Jacob, University of Maryland
                Jaime Moreno, IBM T.J. Watson Research Center
                Mateo Valero, UPC Spain
                Paul Webster, AT&T Research Labs
                Wayne Wolf, Princeton University
                Weng-Fai Wong, National University of Singapore


                CASES 2001 gratefully acknowledges the sponsorship of:

          ARM Cadence IBM National Semiconductor Star*Core



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