Compiler positions available for week ending July 29

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Subject: PhD position available, Edinburgh
Date: Thu, 26 Jul 2001 13:29:53 +0100
From: "Michael O'Boyle" <mob@dcs.ed.ac.uk>


PhD Studentship in Low Power Compilation and Microarchitecture
at University of Edinburgh




There is currently a vacancy for an EPSRC funded PhD Studentship
within the Compiler Group
(http://www.icsa.informatics.ed.ac.uk/research/groups/compilers/) at
the Institute for Computer Systems Architecture
(http://www.icsa.informatics.ed.ac.uk/), Division of
Informatics,(http://www.informatics.ed.ac.uk/) University of
Edinburgh, Scotland, UK.


The studentship is for 3 years and is in the area of Low Power
compiler and processor design. This project is in conjunction with
Prof. Antonio Gonzalez at Universitat Polytechnica Catalunya (UPC) in
Barcelona and it is anticipated that there will be an opportunity for
frequent research visits between the two sites.


Candidates should hold a good first degree and be self-motivated.
Knowledge of compiler and architecture would be useful but not
obligatory. The compiler group investigates a diverse range of
problems from adaptive java compilation to auto-parallelising for
embedded DSP systems. There are close links with other UK, European
and US groups and there is ample opportunity for creative study and
interaction.


The start date for the studentship is flexible, but can be as early
as October 1st, 2001. If you are interested or require further
particulars, please email Dr Michael O'Boyle, mob@dcs.ed.ac.uk






Overview


The aim of this project is to investigate new microarchitectural and
compiler techniques to reduce the power consumption of
microprocessors. Currently, more than 95% of microprocessors are
produced for embedded systems where low power requirements are
essential. Furthermore, mobile systems need to make efficient use of
energy due to to limited battery life, which is not expected to
increase dramatically in the near future. Non-embedded, high
performance microprocessors also have power consumption problems as
they have to deal with heat dissipation and high peak current. This
requires very expensive cooling systems, which grows superlinearly
with respect to performance and will soon reach unreasonable levels.
Thus power consumption has become a critical issue in processor
design.










The overall objective of this project is to investigate new
architectural and compiler techniques to reduce power consumption in
microprocessors.


The strategic aims of the project are:


  To analyse in detail the source of power consumption of
  microprocessors using cycle accurate cycle simulation tools.


  To investigate and propose new hardware and software techniques able
  to mitigate effectively the total energy required for computation.




The project has the following technical objectives:


  Analyse and validate efficient power consumption modelling for high level
  architectural performance simulators


  Investigate energy-conscious hardware design alternatives and its
  impact on performance for different power critical parts of a
  general purpose microarchitecture.


  Investigate new code restructuring and generation approaches
  to power concious compilation.


  Study feasible implementations of the proposed techniques for
  microarchitectural and compiler design.




This project will address the issue of realistic implementations,
different methodologies and the synergy between hardware and software
to design low power computing systems. If successful this will be of
direct benefit to UK vendors of embedded hardware and software
systems.

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