Re: Efficient bytecode design and interpretation

> [It's been discussed before. My suggestion is that unlike the design for
> a physical architecture, there's little added cost to providing zillions
> of operators, and the more each operator does the fewer times you go
> through the interpreter loop, so a CISC design likely wins. You might
also


That's true up to a point -- there are two breakpoints proportional to
L1 and L2 instruction cache sizes. That makes a huge difference, and can
balance out the advantage of using very many opcodes.




\\ Eugene Kuznetsov
\\ eugene@datapower.com
\\ DataPower Technology, Inc.

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