Related articles |
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Testing the performance of Instruction Scheduler. phani.sesha@wipro.com (phani narasimhan venkata sesha myreddy) (2000-11-09) |
Re: Testing the performance of Instruction Scheduler. gporr@gscdump.columbiasc.ncr.com (2000-11-09) |
Re: Testing the performance of Instruction Scheduler. d97roli@dtek.chalmers.se (2000-11-11) |
Re: Testing the performance of Instruction Scheduler. Sid-Ahmed-Ali.TOUATI@inria.fr (Sid Ahmed Ali TOUATI) (2000-11-11) |
Re: Testing the performance of Instruction Scheduler. plakal@nospam-cs.wisc.edu (2000-11-16) |
From: | "phani narasimhan venkata sesha myreddy" <phani.sesha@wipro.com> |
Newsgroups: | comp.compilers |
Date: | 9 Nov 2000 12:08:27 -0500 |
Organization: | WIPRO |
Keywords: | optimize, question |
Posted-Date: | 09 Nov 2000 12:08:27 EST |
hai all,
How much performance gain can be expected from an instruction scheduler?
I have written an instruction scheduler for a database code generator.
The scheduler is tined to the graph generated. The target CPU is
ultrasparc-ii The scheduler contains the global, local and the
instruction grouping logic.
I did not got the expected performance. The gain on average is 6 to 8
%. The graph is size very huge. Sometimes 200 blocks and 2000
instructions.
According to the ultrasparc-II manual if the insns are properly
scheduled CPI can be brought down to 0.25.
Is there any tool to calculate the number of cycles taken by the code
at run-time?
Is there any tool to find for a specific run how many data cache
misses have occured?
Is there any tool that gives the number of pipiline stalls that have
occured?
Is there any other way to look at the performance , apart from just
comparing the execution times?
How much performance gain one can expect from an instruction
scheduler?
ThankYou for reading.
Hoping any help in this.
ThankYou.
phani.
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