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[21 later articles] |
From: | sjmeyer@www.tdl.com (Steve Meyer) |
Newsgroups: | comp.compilers |
Date: | 23 Oct 2000 21:59:42 -0400 |
Organization: | Global Network Services - Remote Access Mail & News Services |
References: | 00-10-148 00-10-174 |
Keywords: | C, translator |
I am trying to use C as back end for Verilog compiler (Verilog is a
hardware description language) and am running into a problem where gcc
(I think also with Sun CC 4.2 from a few experiments) optimizer bogs
down and produces poor results on very large flat sections (functions)
of C code.
Verilog values are 4 or 128 that must be treated as vectors with cross
terms and most objects require multiple 32 bit words for storage.
Result is that a simple Verilog procedural assignement can easily
require 10 complex C statements and Verilog is often already generated
from a computer program as large flat sections. This results in very
large flat translator output C code procedures.
But it turns out most statements in Verilog are independent so
optimizer does not really need to look for basic blocks across Verilog
statement boundaries. Is there a way to tell C compiler optimizer
about this property? I have tried surrouding C statements with extra
level block ({}) with no declarations but it does ont seem to help.
Breaking long sections into multiple procedures seems to be even worse
because there are many context C variables needed in Verilog execution
so procudural call over head slows down exection speed.
Has anyone found solution for this problem? Thanks in advance for any
help. /Steve
--
Steve Meyer Phone: (415) 296-7017
Pragmatic C Software Corp. Fax: (415) 296-0946
220 Montgomery St., Suite 925 email: sjmeyer@pragmatic-c.com
San Francisco, CA 94104
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