Re: Branch prediction hints in an ISA

djimenez@cs.utexas.edu (Daniel A. Jimenez)
12 Oct 2000 22:00:32 -0400

          From comp.compilers

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Re: Branch prediction hints in an ISA djimenez@cs.utexas.edu (2000-10-12)
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Re: Branch prediction hints in an ISA anton@mips.complang.tuwien.ac.at (2000-10-18)
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From: djimenez@cs.utexas.edu (Daniel A. Jimenez)
Newsgroups: comp.compilers
Date: 12 Oct 2000 22:00:32 -0400
Organization: CS Dept, University of Texas at Austin
References: 00-10-078
Keywords: architecture, design

  <timgleason@my-deja.com> wrote:
>Hey I was just thinking. Does anyone know of any Instruction Sets
>that have an extra bit in the branch instruction to be used as a
>"hint" for the branch prediction logic? ...


>[Yes, it's been done many times. IA-64, for example, has it. I gather
>that static branch prediction is OK, but it's no substitute for dynamic
>branch prediction. -John]


As I recall, branches in IA-64 have at least two kinds of hint
information for branches: static/dynamic and taken/not taken. For
instance, you can specify that a branch is biased to be taken, but the
dynamic predictor should still be used, or you can tell the machine to
just always predict taken.


For some branches, it really doesn't matter which predictor is used;
performance will be about the same. For instance, consider a loop that
iterates about 1000 times. The back-edge branch will almost always be
taken, and there's no way a dynamic predictor will be able to predict
the rare exception. In this case, you might as well just predict the
branch statically. In other cases, like branches that alternate with
some complex but predictable pattern, it's better to let the dynamic
predictor do the job. Why not just always use the dynamic predictor?
Because of aliasing, i.e., the interference of different static branches
with each other in the branch prediction tables. Essentially, there are
limited resources dedicated to dynamic branch prediction, so filtering
out the highly biased branches gives more resources to the other branches.
This can be a significant source of performance improvement; on the SPEC CPU
2000 integer benchmarks, 53% of all static branches are highly biased (i.e.,
are either mostly taken or mostly untaken >= 98% of the time). The amount
of branch prediction state reachable in one cycle is not likely to increase
in future microarchitectures, so this will remain an important issue.
--
Daniel Jimenez djimenez@cs.utexas.edu



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