Related articles |
---|
Branch prediction hints in an ISA timgleason@my-deja.com (2000-10-10) |
Re: Branch prediction hints in an ISA broeker@physik.rwth-aachen.de (Hans-Bernhard Broeker) (2000-10-12) |
Re: Branch prediction hints in an ISA peter_flass@my-deja.com (2000-10-12) |
Re: Branch prediction hints in an ISA djimenez@cs.utexas.edu (2000-10-12) |
Re: Branch prediction hints in an ISA Kahrs.Juergen@stn-atlas.de (Juergen Kahrs) (2000-10-12) |
Re: Branch prediction hints in an ISA erik@arbat.com (Erik Corry) (2000-10-12) |
Re: Branch prediction hints in an ISA vbdis@aol.com (2000-10-12) |
Re: Branch prediction hints in an ISA zs@ender.cs.mu.oz.au (2000-10-15) |
Re: Branch prediction hints in an ISA david.thompson1@worldnet.att.net (David Thompson) (2000-10-18) |
[3 later articles] |
From: | peter_flass@my-deja.com |
Newsgroups: | comp.compilers |
Date: | 12 Oct 2000 21:59:31 -0400 |
Organization: | Deja.com - Before you buy. |
References: | 00-10-078 |
Keywords: | architecture |
Power-PC. By default forward conditional branches are assumed not
taken, and backwards assumed taken. The programmer can override this.
beq cr0,*-10 # predicted taken by default
beg+ cr0,*-10 # predicted not taken
timgleason@my-deja.com wrote:
> Hey I was just thinking. Does anyone know of any Instruction Sets
> that have an extra bit in the branch instruction to be used as a
> "hint" for the branch prediction logic?
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